• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.3
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• pp.137-143
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• 2017

This paper presents a smart parking guidance system based on IoT car-stoppers. The car-stopper embedding an IoT sensor module has the advantage of easy installation compared to conventional parking sensors buried in ground. The parking status data are transferred to the IoT gateway by the sequential point-to-point communication between the car-stoppers. The data transferred from the IoT gateway are stored in the web server, and parking spaces can be monitored remotely through the Android app in a smart device. An active/sleep cycle method using a watch dog timer is employed to reduce the power consumption of the battery powered car-stopper. The power consumption of the car-stopper is measured to be 80 and 25 mW at the active and sleep mode, respectively. A configuration of ultra-low-power IoT sensor module is proposed to minimize the power consumption in the sleep mode. The operation of the implemented system has been verified in a real-world parking lot.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8A
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• pp.661-668
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• 2012

In this paper, we introduce the low power wireless communication method and propose new protocol and algorithm for wireless communication which can be applied Active RFID system. Transceiver module is composed of MCU, RF transceiver and chip antenna. and it used the lithium coin battery for power supply. The experimental result is confirmed minimum power consumption which show average $10{\mu}A$(packet transmit) and $30{\mu}A$(packet receive) per second. It can be used ultra low power wireless communication. this result is possible for using the algorithm which predict the arrival time of packet. and it indicates that are possible to prevent malfunction and enhance responsiveness.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.1
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• pp.61-67
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• 2014

Conventional synchronous circuits in low power required systems such as sensor systems cannot only satisfy the timing requirement of the low voltage digital systems, but also they may generate wrong outputs under the influence of PVT variations and aging effects. Therefore, in the reliable ultra-low power design, asynchronous circuits have recently been reconsidered as a solution for scaling issues. However, it is not easy to totally replace synchronous circuits with asynchronous circuits in the digital systems, so the interfacing between the synchronous and asynchronous circuits is indispensable for the digital systems. This paper presents a new design for interfacing between asynchronous circuits and synchronous circuits, and the interface circuits are applied to a $4{\times}4$ multiplier logic designed using 0.11um technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.65-73
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• 2006

This work presents a 14b 200KS/s $0.87mm^2$ 1.2mW 0.18um CMOS algorithmic A/D converter (ADC) for intelligent sensors control systems, battery-powered system applications simultaneously requiring high resolution, low power, and small area. The proposed algorithmic ADC not using a conventional sample-and-hold amplifier employs efficient switched-bias power-reduction techniques in analog circuits, a clock selective sampling-capacitor switching in the multiplying D/A converter, and ultra low-power on-chip current and voltage references to optimize sampling rate, resolution, power consumption, and chip area. The prototype ADC implemented in a 0.18um 1P6M CMOS process shows a measured DNL and INL of maximum 0.98LSB and 15.72LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 54dB and 69dB, respectively, and a power consumption of 1.2mW at 200KS/s and 1.8V. The occupied active die area is $0.87mm^2$.

• Electronics and Telecommunications Trends
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• v.31 no.1
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• pp.99-110
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• 2016

본고에서는 초연결(Hyper-connectivity) 사회 구현에 필수적인 초저지연, 고속/대용량화, 고집적화, 저전력화와 같은 요구사항들을 만족하기 위해 빠르게 진화하고 있는 광 네트워크 인프라 기술을 광 전달망, 가입자망, 광 트랜시버 영역으로 나누어서 영역별로 기술추세와 관련 표준화 동향을 살펴보고 이를 기반으로 미래 광 네트워크 인프라 기술의 진화방향을 조망한다.

• 전자공학회논문지 IE
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• v.46 no.4
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• pp.1-7
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• 2009

The final goal of ITS and ETC will be to improve the traffic efficiency and mobile safety without new road construction. DSRC system is emerging nowadays as a solution of them. China DSRC standard which was released in May 2007 has low bit rate, short message and simple MAC control. The DSRC system users want a long lifetime over 1 year with just one battery. In this paper, we propose the SoC of very low power consumption architecture. Several digital logic concept and analog power control logics were used for very low power consumption. The SoC operation mode and clock speed, operation voltage range, wakeup signal detector, analog comparator and Internal Voltage Regulator & External Power Switch were designed. We confirmed that the SoC power consumption is under 8.5mA@20Mhz, 0.9mA@1Mhz in active mode, and under 5uA in power down mode, by computer simulation. The design of SoC was finished on Aug. 2008, and fabricated on Nov. 2008 with $0.18{\mu}m$ CMOS process.

• Journal of Digital Convergence
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• v.12 no.7
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• pp.247-252
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• 2014

Traffic network is composed of passing vehicls, delayed vehicles, traffic situation which is traffic incomes of traffic interfacing system. Traffic green time light is concluded by inside input factor, that is green light cycle, yellow light cycle, led light cycle, which light cycle is sensor inputs. That light cycle is converted to traffic phase composed of passing peoples and delayed vehicles, whose intervals is concluding of traffic network factors composed of consumptiom power factors, delayed time situation, occupying sensor nodes. This is very important sector,because of much poor traffic situation.

• Journal of IKEEE
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• v.22 no.2
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• pp.499-505
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• 2018

Since feedback field-effect transistors (FBFETs) have ideal switching characteristics resulting from feedback phenomenon caused by electrons and holes in the channel region, the researches about FBFET devices have been proposed and demonstrated worldwide recently. The device operated with novel principle can operate as a switching electronic device. Besides, because the hysteresis characteristics of the device by accumulated electrons and holes in channel region can be also utilized for memory applications, its application range is wide. In this paper, we cover various device structures of FBFET proposed until now and their operation mechanism, and then look into their applicable fields.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.137-140
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• 2010

본 연구에서는 일상생활에서 보다 편리하게 건강모니터링을 수행하기 위해 신체에 착용 가능한 심전도 및 맥파 계측 시스템을 구현하고자 하였다. 이를 위하여 배터리로 구동 가능한 초소형의 심전도 및 맥파 측정 시스템을 구현하였으며, 계측된 생체신호의 무선전송을 위해 초저전력 무선 센서네트워크 기술을 적용한 무선 생체신호 전송시스템을 구현하였다. 무선으로 전송된 심전도 및 맥파 신호는 잡음 제거 및 심박동을 검출하기 위하여 전처리과정과 적응 가변형 문턱치를 적용하였으며, 검출된 심박동으로부터 동맥순환계의 긴장도 및 유순도의 변화를 반영하는 맥파전달시간(pulse transit time, PTT)을 계산하였다. 구현된 무선 맥파전달시간 계측시스템과 기존 상용시스템의 비교 평가를 수행함으로써 구현된 시스템의 유용성을 평가하고자 하였으며, 혈압 및 맥파전달시간의 동시계측을 통해 자세 변화에 따른 혈압의 변화 및 맥파전달시간의 변화양상을 관찰함으로써 혈압과 맥파전달시간의 관계를 추정하고자 하였다.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.2
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• pp.189-194
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• 2018

Nowadays most integrated circuits are built using the bulk CMOS technology, but it has much difficulty in further reduction of the power consumption and die size. As a super low-power technology to solve such problems, the SOI technology attracts great attention recently. In this paper, the study results of the temperature dependency of the hot carrier effects in the n-channel MOSFETs fabricated on the thin SOI substrate were discussed. In spite that the devices employed the LDD structure, the hot carrier effects were more serious than expected due to the high series resistance between the channel region and the substrate contact to the ground, and were found to be less serious for the higher temperature with the more phonon scattering in the channel region, which resulted in reducing the hot electron generation.