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A Single-Bit 2nd-Order Delta-Sigma Modulator with 10-㎛ Column-Pitch for a Low Noise CMOS Image Sensor (저잡음 CMOS 이미지 센서를 위한 10㎛ 컬럼 폭을 가지는 단일 비트 2차 델타 시그마 모듈레이터)

  • Kwon, Min-Woo;Cheon, Jimin
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.8-16
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    • 2020
  • In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for column-parallel analog-to-digital converter (ADC) array used in a low noise CMOS image sensor. The proposed modulator implements two switched capacitor integrators and a single-bit comparator within only 10-㎛ column-pitch for column-parallel ADC array. Also, peripheral circuits for driving all column modulators include a non-overlapping clock generator and a bias circuit. The proposed delta-sigma modulator has been implemented in a 110-nm CMOS process. It achieves 88.1-dB signal-to-noise-and-distortion ratio (SNDR), 88.6-dB spurious-free dynamic range (SFDR), and 14.3-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 418 for 12-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 970×10 ㎛2 and 248 ㎼, respectively.

A 1.2V 90dB CIFB Sigma-Delta Analog Modulator for Low-power Sensor Interface (저전력 센서 인터페이스를 위한 1.2V 90dB CIFB 시그마-델타 아날로그 모듈레이터)

  • Park, Jin-Woo;Jang, Young-Chan
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.786-792
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    • 2018
  • A third-order sigma-delta modulator with the architecture of cascade of integrator feedback (CIFB) is proposed for an analog-digital converter used in low-power sensor interfaces. It consists of three switched-capacitor integrators using a gain-enhanced current-mirror-based amplifier, a single-bit comparator, and a non-overlapped clock generator. The proposed sigma-delta analog modulator with over-sampling ratio of 160 and maximum SNR of 90.45 dB is implemented using $0.11-{\mu}m$ CMOS process with 1.2-V supply voltage. The area and power consumption of the sigma-delta analog modulator are $0.145mm^2$ and $341{\mu}W$, respectively.

A VPP Generator Design for a Low Voltage DRAM (저전압 DRAM용 VPP Generator 설계)

  • Kim, Tae-Hoon;Lee, Jae-Hyung;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.776-780
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    • 2007
  • In this paper, the charge pump circuit of a VPP generator for a low voltage DRAM is newly proposed. The proposed charge pump is a 2-stage cross coupled charge pump circuit. The charge transfer efficiency is improved, and Distributed Clock Inverter is located in each charge pump stage to reduce clock period so that the pumping current is increased. In addition, the precharge circuit is located at Gate node of charge transfer transistor to solve the problem which is that the Gate node is maintained high voltage because the boosted charge can't discharge, so device reliability is decreased. The simulation result is that pumping current, pumping efficiency and power efficiency is improved. The layout of the proposed VPP generator is designed using $0.18{\mu}m$ Triple-Well process.

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A Study on a 3-Dimensional Positioning System over Indoor Wireless Environments (실내 무선 환경에서 3차원 위치 추적 시스템에 관한 연구)

  • Kang, Byeong-Gwon;Choi, Sung-Ja;Kim, Gui-Jung;Park, Yong-Seo
    • Journal of Digital Convergence
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    • v.12 no.11
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    • pp.273-279
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    • 2014
  • In this paper, we propose a novel algorithm for three dimensional positioning system and implement a system over indoor wireless channel. A commercial modules are used for mobile and fixed nodes which are product of German company Nanotron Co. This module adopts chirp spread spreading scheme as modulation method to improve the ranging resolution and the module satisfies the IEEE standard 802.15.4a. The distance computation is based on received signal strength(RSS) levels and trilateration method. A testbed was set up to measure and compare the positioning estimation error of the proposed algorithm. The experiments results showed that the accuracy of location estimation was sufficiently good as much as 1m distance error in a wireless environment in an office building.

Swell Effect Correction of Sub-bottom Profiler Data with Weak Sea Bottom Signal (해저면 신호가 약한 천부해저지층 탐사자료의 너울영향 보정)

  • Lee, Ho-Young;Koo, Nam-Hyung;Kim, Wonsik;Kim, Byoung-Yeop;Cheong, Snons;Kim, Young-Jun;Son, Woohyun
    • Geophysics and Geophysical Exploration
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    • v.18 no.4
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    • pp.181-196
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    • 2015
  • A 3.5 kHz or chirp sub-bottom profiling survey is widely used in the marine geological and engineering purpose exploration. However, swells in the sea degrade the quality of the survey data. The horizontal continuity of profiler data can be enhanced and the quality can be improved by correcting the influence of the swell. Accurate detection of sea bottom location is important in correcting the swell effect. In this study, we tried to pick sea bottom locations by finding the position of crossing a threshold of the maximum value for the raw data and transformed data of envelope or energy ratio. However, in case of the low-quality data where the sea bottom signals are not clear due to sea wave noise, automatic sea bottom detection at the individual traces was not successful. We corrected the mispicks for the low quality data and obtained satisfactory results by picking a sea bottom within a range considering the previous average of sea bottom, and excluding unreliable big-difference picks. In case of trace by trace picking, fewest mispicks were found when using energy ratio data. In case of picking considering the previous average, the correction result was relatively satisfactory when using raw data.