• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.2
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• pp.104-110
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• 2003

A new direct digital frequency synthesizer (DDFS) is proposed. The DDFS uses a new ROM compression method that divides each ROM in the conventional DDFS into two ROMs (a quantization ROM and an error ROM). The total size of the ROMs in the proposed DDFS is significantly reduced compared to the original ROM. The ROM compression ratio of 78 is achieved for a DDFS with 12bit output data. A DDFS with 12bit output data for sine function was implemented in a 0.35${\mu}{\textrm}{m}$ CMOS technology. The power dissipation is 9.56㎽ at 100MHz with 3.3V and the maximum operating clock frequency is 330MHz.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.36-43
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• 1999

A new design of a Direct Digital Frequency Synthesizer(DDFS) is presented, where a pipelined Coordinate Rotate Digital Computer(CORDIC) circuit is employed to calculate amplitude values of all the phase angles of sinusoidal waveforms produced. a near-optimal number of pipeline stages is determined based on an error analysis of calculated amplitude values in terms of the number of bits. The DDFS was implemented using a field programmable gate array, yielding a stable operating frequency of 11.75MHz. The measurement results show higher resolution, faster operating speed and simpler fabrication process, compared to ROM-based counterparts. The CORDIC-based DDFS yields 5 times higher resolution than conventional ROM-based versions.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.3
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• pp.35-46
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• 1999

A derotator VLSI which compensates for the frequency and phase errors of a received signal in digital communication systems was developed employing a CORDIC algorithm. The CORDIC circuit directly rotates the input signal according to the phase error information, thus is much simpler than the conventional derotator architecture which consists of a DDFS (Direct Digital Frequency Synthesizer) and a complex multiplier. Since a derotator needs only small phase error accumulation, a fast direction sequence generation method which exploits the linearity of the arctangent function in small angles is utilized in order to enhance the operating speed. The chip was designed and implemented using a $0.6\mu\textrm{m}$ triple metal CMOS process by the full custom layout method. The whole chip size is $6.8\textrm{mm}^2$ and the maximum operating frequency is 25 MHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.10
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• pp.914-924
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• 1991

It has been generally used for PLL(Phase Locked Loop) to be synthesized randomly chosen frequency state, but the PLL locking time was inevitable element. A direct digital synthesizer. Which makes output frequency directly in sine wave by a phase accumulating method, could be leiminate the defect, although a phase distortion in frequency spectrum. In order to improve this disadvantage, the phase accumulating method is reconsidered in the side of he output wave formula expression. A new mechanism is proposed, and it is constructed by a most suitable logic elements. The spectrum of synthesized sine waveform is simulated and compared with a measured value, and it’s the coherence frequency hoppong state with the PN(Pseudo Noise) code sequence is confirmed. In this results, the power levels of phase distortion harmonics are decreased to 10~25dB and bandwidths are increased to 420kHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.607-610
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• 2006

The Digital Frequency Synthesizer(DFS) that generates the wideband signal with hish speed frequency hopping rate and high frequency resolution characteristics was implemented in this paper. The DFS was applied as local oscillator for direct frequency conversion IF modules of DVB-RCS, which directly generates the transmission immediate frequency signal by using DDS and wideband PLL technologies. The DDS technology provides high speed frequency hopping rate and high frequency resolution characteristics, which ate also the DVB-RCS requirement. The wideband PLL technology also provides the wideband signal generation, which is a necessity for direct frequency conversion modules. The implemented DFS provide the spurious suppression characteristic of -50 dBc, frequency resolution of 0.233 Hz and frequency hopping rate of 125 ns, respectively. Also the DFS represent the amplitude flatness of 3 dB and less in the pass-band and phase noise characteristic of -75 dBc/Hz at 1 kHz frequency offset.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.2
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• pp.223-228
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• 2007

The Digital Frequency Synthesizer(DFS) that generates the wideband signal with high speed frequency hopping rate and high frequency resolution characteristics was designed and implemented in this paper The DFS was applied as local oscillator for direct frequency conversion IF modules of DVB-RCS, which directly generates the transmission immediate frequency signal by using DDS and wideband PLL technologies. The DDS technology provides high speed frequency hopping rate and high frequency resolution characteristics, which are also the DVB-RCS requirement. The wideband PLL technology also provides the wideband signal generation, which is a necessity for direct frequency conversion modules. The implemented DFS provides the spurious suppression characteristic of -50 dBc and less, frequency resolution of 0.233 Hz and frequency hopping rate of 125 ns, respectively. Also the DFS represents the amplitude flatness of 3 dB and less in the pass-band, and phase noise characteristic of -75 dBc/Hz at 1 kHz frequency offset.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.7
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• pp.669-674
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• 2011

In this paper, a method for reduction of spurious signal in Digital RF Memory(DRFM) is proposed. Spurious response is a major performance issue of DRFM. This method is based on mixing a random phase LO signal into input IF signal and sampling it. The random phase LO signal is generated by high speed phase shifting characteristic of Direct Digital Synthesizer(DDS). Through this technique, we achieved an enhancement of 5~10 dB of spurious response.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.951-954
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• 1999

A direct digital frequency synthesizer is designed in full custom method using 0.65${\mu}{\textrm}{m}$ CMOS n-well technology The chip provides the capability of the parallel operation using up to 4 chips with an operation frequency of 440MHz. The generated waveform can be modulated by various modulation techniques such as QPSK, 256 . 64. 32 . 16 QAM and FM.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.10
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• pp.1179-1182
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• 2016

In this paper, a new method to reduce the size of ROM in the direct digital frequency synthesizer (DDFS) is proposed. This method use the sine-linear phase difference method and differential PCM. The new ROM compression method can reduce the ROM size by using the two ROM. The quantized value of sine-linear phase difference is saved by the ROM1 of the $2^N$ sample period. The ROM2 save the difference between the original sine-linear phase difference value and the saved sample value of the ROM1. The ROM compression ratio of 37% is achieved by this method. Also, the power consumption is decreased according to the ROM size reduction.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.146-146
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• 2009

최근에 광도전체와 형광체를 기반으로 평판형 디지털 방사선 검출기의 상업적 발전가능성에 많은 관심을 가지고 있다. 본 연구는 기존의 직접변환방식에 널리 사용되었던 비정질 셀레늄 (amorphous selenium) 기반의 디지털 방사선 검출기보다 높은 전기적신호 및 동작특성을 가지는 물질층을 제작하기 위해 High Purity (99.99%)의 상용화된 $PbI_2$를 특수용매에 담가두었다가 약 1시간동안 Biology 초음파 처리한 후 농축기를 사용하여 건조된 $PbI_2$를 3Roll-milling을 사용하여 미세크기의 Powder를 얻어내었다. 합성된 $PbI_2$ Powder를 PIB(Particle-in-Binder)법을 이용하여 전도성을 가진 ITO(Indium-tin-oxide)코팅된 유리판에 제작된 필름의 상부에 Magnetron sputtering system 을 사용하여 전극을 $1cm{\times}1cm$의 크기로 증착하였다. I-V 테스트를 통하여 X선 조사시 $PbI_2$필름의 Sensitivity, Dark current, SNR(signal-to-noise ratio)을 측정하여 필름의 전기적 검출 특성을 정량적으로 평가하였고 SEM(scanning electron microscope)을 통하여 입자의 크기를 관찰하였다.