• Title/Summary/Keyword: 지터제거

Search Result 21, Processing Time 0.033 seconds

Timing Jitter Compensation in Data-Driven Echo Canceller (Data-Driven 반향 제거기를 위한 타이밍 지터 보상)

  • 이재혁;이용환
    • Proceedings of the IEEK Conference
    • /
    • 2000.09a
    • /
    • pp.565-568
    • /
    • 2000
  • 본 논문에서는 data-driven 반향제거기 구조에서 타이밍 지터의 보상 방법을 제안한다. V.90PCM 모뎀환경에서 네트윅 클록에 동기가 되어 동작하는 사용자 터미널 모뎀이 디지털 PLL (DPLL)을 이용하여 타이밍 복원을 하면 타이밍 지터 성분이 반향제거기의 성능을 순간적으로 악화 시키게 된다. 제안된 방법은 두개의 계수세트 들로부터 타이밍 지터 발생시 필요한 계수를 디콘볼루션 알고리듬을 이용하여 FIR 필터링을 통해 구하며 발생하는 지터 성분 의 대부분을 보상 해 준다. 또한 제안 방법은 waveform driven 반향제거기에 비해 약간의 성능열화가 있지만 적은 연산량으로 타이밍 지터보상을 할 수 있는 장점이 있다.

  • PDF

Fast Frame Jitter Matching for Image Sequence (영상 시퀀스의 프레임 지터 고속 정합 알고리즘)

  • Lee, Im-Geun;Woo, Young-Woon;Han, Soo-Whan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2007.10a
    • /
    • pp.973-976
    • /
    • 2007
  • 본 논문에서는 영상 시퀀스 내의 흔들림을 제거하는 고속 알고리즘을 제안한다. 프레임 지터 제거에 관한 연구는 영상 취득과정에서 발생하는 손떨림에 의한 영향을 제거하거나 오래된 영화필름에서 녹화장치의 기구적인 문제로 인해 발생한 흔들림을 제거하기 위해 많이 연구되었다. 제안하는 알고리즘은 영상 프레임을 배경과 전경 영역으로 나누고 움직임 벡터를 이용하여 천역 움직임을 구한다. 전역 움직임을 구하는 과정에서 잘못된 움직임 예측이 발생할 가능성이 높은 블록을 사전에 제거하여 속도를 개선하였으며 알고리즘을 실제 영상에 적용하여 영상 프레임 정합됨을 보였다.

  • PDF

Implementation of a Jitter and Glitch Removing Circuit for UHF RFID System Based on ISO/IEC 18000-6C Standard (UHF대역 RFID 수신단(리더)의 지터(비트동기) 및 글리치 제거회로 설계)

  • Kim, Sang-Hoon;Lee, Yong-Joo;Sim, Jae-Hee;Lee, Yong-Surk
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.32 no.1A
    • /
    • pp.83-90
    • /
    • 2007
  • In this paper, we propose an implementation and an algorithm of 'Jitter and Glitch Removing Circuit' for UHF RFID reader system based on ISO/IEC 18000-6C standard. We analyze the response of TI(Texas Instrument) Gen2 tag with a reader using the proposed algorithm. In ISO/IEC 18000-6C standard, a bit rate accuracy(tolerance) is up to +/-22% during tag-to-interrogator communication and +/-1% during interrogator-to-tag communication. In order to solve tolerance problems, we implement the Jitter and Glitch Removing Circuit using the concept of tolerance and tolerance-accumulation instead of PLL(DPLL, ADPLL). The main clock is 19.2MHz and the LF(Link Frequency) is determined as 40kHz to meet the local radio regulation in korea. As a result of simulations, the error-rate is zero within 15% tolerance of tag responses. And in the case of using the adaptive LF generation circuit, the error-rate varies from 0.000589 to zero between 15% and 22% tolerance of tag responses. In conclusion, the error-rate is zero between 0%-22% tolerance of tag response specified in ISO/IEC 18000-6C standard.

The Analysis of Event-based Jitter Buffer Algorithm (이벤트 방식 지터 버퍼 알고리즘의 분석)

  • Choi, Seung-Han;Park, Jong-Min;Seo, Chang-Ho
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.23 no.5
    • /
    • pp.867-871
    • /
    • 2013
  • In this paper, a major factor in determining voice quality that corresponds to the jitter and jitter buffer algorithm for removing jitter will be described. We analyze various jitter buffer algorithms and suggest ways to improve performance of jitter buffer algorithm.

Timing Titter Analysis in the ISDN U-Interface (ISDN U-Interface에서 타이밍지터의 해석)

  • 김동관;이명수;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.13 no.5
    • /
    • pp.369-378
    • /
    • 1988
  • In this paper, the performance of the timing jitter which has great effects on the echo canceller that can be used for full-duplex digital transmission on two-wire subscriber loops is analyzed. The power spectrum of timing jitter is about 8.9dB lower in the AMI input format than in the Polar-NRZ-L input format. The performance of the echo canceller also has been shown improved by 4dB when the input signal is in the AMI format.

  • PDF

A Robust Method of Capturing Ghost Canceling Reference (강인한 고스트제거기준신호 포획방법)

  • 권성재;정창진
    • Proceedings of the Korea Society for Industrial Systems Conference
    • /
    • 2002.06a
    • /
    • pp.76-79
    • /
    • 2002
  • Ghost cancelers need to accurately estimate the distortions suffered by transmitted signals on their way to receivers by capturing ghost canceling reference signals in the vertical blanking interval. As ghosts become much severer, sync separation tends to malfunction, making it impossible to acquire measurement data for channel estimation. This paper presents a robust method of acquiring ghost data using their correlation properties, and evaluates its performance through computer simulation. The reference signals are inserted in such a manner that the polarity alternates from one frame to another to remove color bursts and sync signals, and to increase the signal-to-noise ratio as well. As a result, however, they are prone to timing jitters. So a simple yet effective method is proposed that can correct for even fractional time delays. The timing errors are found to be less than about 4% of the sample spacing.

  • PDF

A 2.5 Gb/s Burst-Mode Clock and Data Recovery with Digital Frequency Calibration and Jitter Rejection Scheme (디지털 주파수 보정과 지터 제거 기법을 적용한 2.5 Gb/s 버스트 모드 클럭 데이터 복원기)

  • Jung, Jae-Hun;Jung, Yun-Hwan;Shin, Dong Ho;Kim, Yong Sin;Baek, Kwang-Hyun
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.7
    • /
    • pp.87-95
    • /
    • 2013
  • In this paper, 2.5 Gb/s burst-mode clock and data recovery(CDR) is presented. Digital frequency calibration scheme is adopted to eliminate mismatch between the input data rate and the output frequency of the gated voltage controlled oscillator(GVCO) in the clock recovery circuitry. A jitter rejection scheme is also used to reduce jitter caused by input data. The proposed burst-mode CDR is designed using 0.11 ${\mu}m$ CMOS technology. Post-layout simulations show that peak-to-peak jitter of the recovered data is 14 ps with 0.1 UI input referred jitter, and maximum tolerance of consecutive identical digit(CID) is 2976 bits without input data jitter. The active area occupies 0.125 $mm^2$ without loop filter and the total power consumption is 94.5 mW.

Jitter Noise Suppression in the Digital DLL by a New Counter with Hysteretic Bit Transitions (Hysteresis를 가지는 카운터에 의한 디지털 DLL의 지터 잡음 감소)

  • 정인영;손영수
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.41 no.11
    • /
    • pp.79-85
    • /
    • 2004
  • A digitally-controlled analog-block inevitably undergoes the bang-bang oscillations which may cause a big amplitudes of the glitches if the oscillation occurs at the MSB transition points of a binary counter. The glitch results into the jitter noise for the case of the DLL. In this paper, we devise a new counter code that has the hysteresis in the bit transitions in order to prevent the transitions of the significant counter-bits at the locking state. The maximum clock jitter is simulated to considerably reduce over the voltage-temperature range guaranteed by specifications. The counter is employed to implement the high speed packet-base DRAM and contributes to the maximized valid data-window.

Robust speech quality enhancement method against background noise and packet loss at voice-over-IP receiver (배경잡음 및 패킷손실에 강인한 voice-over-IP 수신단 기반 음질향상 기법)

  • Kim, Gee Yeun;Kim, Hyoung-Gook
    • The Journal of the Acoustical Society of Korea
    • /
    • v.37 no.6
    • /
    • pp.512-517
    • /
    • 2018
  • Improving voice quality is a major concern in telecommunications. In this paper, we propose a robust speech quality enhancement against background noise and packet loss at VoIP (Voice-over-IP) receiver. The proposed method combines network jitter estimation based on hybrid Markov chain, adaptive playout scheduling using the estimated jitter, and speech enhancement based on restoration of amplitude and phase to enhance the quality of the speech signal arriving at the VoIP receiver over IP network. The experimental results show that the proposed method removes the background noise added to the speech signal before encoding at the sender side and provides the enhanced speech quality in an unstable network environment.

Image Noise Removal using State Estimation Filter (상태 추정 필터를 이용한 영상 잡음 제거)

  • Jang, Hoon-Seok
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.15 no.4
    • /
    • pp.237-242
    • /
    • 2022
  • Acquiring high-quality images in control and measurement systems is one of the important factors. Among image acquisition technologies, SFF (Shape from Focus) is a technology for recovering a 3D shape by acquiring 2D images with different focus levels by moving an object at a predetermined step size along the optical axis. For SFF, when an object is moved at a constant step size, mechanical vibration, referred as jitter noise, occurs in each step along the optical axis. In this paper, a new state estimation filter is designed and applied for reducing the jitter noise. For the application of the proposed method, the jitter noise and focus curves are modeled as Gaussian function. Experimental results demonstrate the effectiveness of proposed method.