• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.7
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• pp.540-549
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• 2017

A phase frequency detector(PFD) composed of logic circuits is widely used in a phase locked loop(PLL) due to the easy implementation for integrated circuits. A frequency locked loop(FLL) removes the reference oscillator in the PLL, and the resonator serves as a reference oscillator. A frequency detector(FD) is indispensable for the FLL configuration, and a FD, which is usually composed of a mixer is used to build an FLL. In this paper, instead of FD using mixer, a FD is constructed by using 1.175 GHz resonator composed of microstrip and PFD taking the versatility of PFD into consideration. Using the designed FD, FLL oscillating at a frequency of 1.175 GHz is composed. As a result of comparison with the FLL composed of FD using mixer, it was confirmed that the proposed FLL has better phase noise performance than FLL using mixer FD with FLL bandwidth.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.7B
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• pp.891-894
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• 2001

본 논문에서는 능동 배열 안테나에서 RF 대신 중간주파수를 이용하여 빔 추적을 하는 방법이 연구되었다. 안테나의 각 배열은 전압제어 발진기, 위상추적기, 혼합기와 결합되어 있으며 혼합기는 안테나 상에서 직접 RF 신호를 직접 중간주파수 신호로 변환시킨다. 전압제어 발진기 입력은 위상추적기에 의하여 조절되며 배열 안테나의 주사범위는 위상추적기와 전압제어발진기에 의하여 결정되었다.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.175-178
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• 2000

본 연구에서는 CDMA단말기용 Receiver MMIC를 설계하였다. 전체회로는 저잡음 증폭기, 하향 주파수 혼합기 그리고 중간주파수 증폭기로 구성된다. 또한 문턱전압과 전원전압의 변화에 대해 회로의 안정성을 높이는 바이어스 보상회로를 추가하였다. 설계시 높은 선형성과 저잡음 특성을 가지도록 토폴리기를 구성하였고 설계 결과 전체 이득은 28.5dB, 저잡음 증폭기의 입력IP3는 8dBm, 하향주파수 혼합기의 입력 IP3는 0dBm이며 전체회로의 소모전류는 22.1mA이다. 레이아웃된 전체회로의 크기는 1.4$\times$1.4 [$\textrm{mm}^2$] 이다.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.15 no.4
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• pp.143-152
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• 2016

In this paper, a MMIC double balanced mixer that can be applied to the tele-communication band is designed and LO power optimization for the mixer is discussed. The chip of the MMIC double-balanced mixer is fabricated on GaAs substrate with the size of $4{\times}4mm^2$. Optimization study of LO power for the MMIC double-balanced mixer proposed in this paper is conducted for the Input IP3 (IIP3) regarding on the linearity of the input signal. When LO power level of+16 dBm is applied to the mixer, IIP3 is obtained to be approximately 23.2 dBm, which is the most outstanding characteristic.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.4B
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• pp.400-405
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• 2001

본 논문에서는 Local Oscillator(LO)의 누설신호 제거를 위해 혼합기의 특성을 이용하여 광대역의 특성을 가지고 RF 채널에 근접한 누설신호를 제거할수 있는 구조를 제안하였다. 제안된 구조는 Half-LO 주파수를 이용하는 방버븡로 LO 누설신호를 일반적인 다른 경우보다 RF 신호대역에서 멀리 떨어진 대역으로 분리시킴으로서 대역 통과여파기로서 쉽게 제거하였다. 상향변환기로서 필요한 저역통과여파기, 대역통과여파기, 그리고 증폭기를 설계하였고 혼합기에 의한 영상성분은 혼합기의 위상을 특성을 이용하여 제거하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1269-1276
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• 2005

In this paper, Mixer using the direct-conversion method intended to use in front-end of a RF receiver is designed. The direct conversion Mixer is an alternative wireless receiver architecture to the well-established superheterodyne, particularly for high integration, low power, and low cost. It operates at 2.4GHz band, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. Layout is implemented with a Mentor IC Station. The 2.4GHz CMOS Mixer employs a modified single-balanced Gilbert Cell with additional MOSFET in the output stages to improve IIP2, which is a standard of linearity in direct conversion receiver. Additional coversion-stages's transconductances are controlled by each MOSFET's physical properties. The HSPICE simulation results show that the 2.4GHz CMOS Mixer has voltage gam of 29dB, IIP2 of 63dBm, respectively. The Mixer also draws 3.5mA from a 3.3V supply.

• Journal of Satellite, Information and Communications
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• v.9 no.2
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• pp.7-11
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• 2014

In this paper, we designed resistive MMIC mixer using $0.5{\mu}m$ p-HEMT process. This Mixer is designed to have a similar performance in -4 ~ 4 dBm local oscillator signal power level and to maintain a constant conversion loss and linear performance due to the variation of local signal. In order to have such characteristics, we designed new feedback circuit topology by using FET, and minimized performance change for LO signal power level variation, also obtain MMIC mixer characteristics which is able to apply in wideband. In the design result, When the LO signal power is -4 ~ 4 dBm, there was 6 dB conversion loss and it came up with the excellent result that IIP3 got over 30 dBm in 0.5 ~ 2.6GHz frequency band.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.5
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• pp.811-816
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• 2019

This paper first proposes a technique to separate clean speech signals and mixed noise signals by using an independent vector analysis algorithm of frequency band for 4 channel speech source signals with a noise. An improved output speech signal from the proposed independent vector analysis algorithm is obtained by using the cross-correlation between the signal outputs from the frequency domain delay-sum beamforming and the output signals separated from the proposed independent vector analysis algorithm. In the experiments, the proposed algorithm improves the maximum SNRs of 10.90dB and the segmental SNRs of 10.02dB compared with the frequency domain delay-sum beamforming algorithm for the input mixed noise speeches with 0dB and -5dB SNRs including white noise, respectively. Therefore, it can be seen from this experiment and consideration that the speech quality of this proposed algorithm is improved compared to the frequency domain delay-sum beamforming algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.397-401
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• 2005

In this paper, we have developed a frequency mixer which can be used as a microwave phase conjugator in the retrodirective array antenna. The retrodirective array, which can reflect the incident wave retrodirertively back to the source direction without any priori information, requires phase conjugators to achieve the phase change of 180 degrees for the incoming signal. frequency mixers can efficiently serve as phase conjugators. The circuit topology is of the 2-port structure to avoid the complexity of LO and Rf signal combination and matching circuits, using a pseudomorphic HEU device. The operating frequencies are 4.0 CHz, 2.01 CHz, and 1.99 CHz for LO, RF, and If signals, respectively. Conversion loss is measured to be -ldB and 1-dB compression point -l5 dBm at the LO power of -10 dBm.

• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.101-105
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• 2004

본 연구에서는 LF2407 DSP제어기를 사용한 혼합형 랜덤 펄스폭 변조기법(HRPWM : Hybrid Random PWM)을 제안하였다. 제안된 HRPWM은 PRBS (Pseudo-Random Binary Sequence)로 동작하는 시프트 레지스터의 lead-lag 랜덤 비트를 사용한다는 점에서 종전의 방법과 동일하다. 그러나 Lead-Lag 랜덤 비트와 논리적인 비교를 하기 위해 고정 주파수의 캐리어를 사용 하지 않고 랜덤 주파수의 삼각파 캐리어를 이용한다는 점이 종전의 방법과 다르다. LF2407 DSP에 의하여 랜덤 수 및 PRBS 그리고 3상 기준 정현파를 실시간으로 발생하며, DSP외부의 주파수 변조기 MAX038에 의하여 랜덤 주파수의 캐리어를 발생한다. 제안된 기법을 LF2407기반의 3상 유도모터 구동장치에 적용한 결과, 모터 전류파형은 종전의 방법과 유사한 파형을 유지하면서도 모터 전압 및 전류의 고조파 스펙트럼은 광대역 주파수로 분포시킬 수 있었다.