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A Frequency Locked Loop Using a Phase Frequency Detector

위상주파수 검출기를 이용한 주파수 잠금회로

  • Im, Pyung-Soon (Department of Radio Science & Engineering, Chungnam National University) ;
  • Lee, Dong-Hyun (Department of Radio Science & Engineering, Chungnam National University) ;
  • Yeom, Kyung-Whan (Department of Radio Science & Engineering, Chungnam National University)
  • Received : 2017.04.06
  • Accepted : 2017.06.19
  • Published : 2017.07.31

Abstract

A phase frequency detector(PFD) composed of logic circuits is widely used in a phase locked loop(PLL) due to the easy implementation for integrated circuits. A frequency locked loop(FLL) removes the reference oscillator in the PLL, and the resonator serves as a reference oscillator. A frequency detector(FD) is indispensable for the FLL configuration, and a FD, which is usually composed of a mixer is used to build an FLL. In this paper, instead of FD using mixer, a FD is constructed by using 1.175 GHz resonator composed of microstrip and PFD taking the versatility of PFD into consideration. Using the designed FD, FLL oscillating at a frequency of 1.175 GHz is composed. As a result of comparison with the FLL composed of FD using mixer, it was confirmed that the proposed FLL has better phase noise performance than FLL using mixer FD with FLL bandwidth.

논리회로로 구성된 위상주파수 검출기(Phase Frequency Detector: PFD)는 집적회로 구현의 용이성으로 인해 위상잠금회로(Phase Locked Loop: PLL)에 널리 사용되고 있다. 반면, 주파수 잠금회로(Frequency Locked Loop: FLL)는 PLL에서 기준발진기를 제거하고 공진기가 기준발진기 역할을 하는 구성이다. FLL 구성에는 주파수 검출기(Frequency Detector: FD)가 반드시 필요하며, 통상적으로 혼합기(mixer)로 구성된 주파수 검출기를 이용한 FLL을 구성하게 된다. 본 논문에서는 혼합기를 이용한 FD대신에, PFD의 범용성을 고려하여, 마이크로스트립으로 구성된 1.175 GHz 공진기와 PFD를 이용하여 FD를 구성하였다. 또한 설계된 FD를 이용 주파수 1.175 GHz에서 발진하는 FLL을 구성하였다. 혼합기(mixer)를 이용한 FD로 구성된 FLL과 비교결과 제안된 FLL은 FLL 대역 내에서 혼합기 FD를 이용한 FLL에 비하여 위상잡음 성능이 우수한 것을 확인하였다.

Keywords

References

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