• Journal of Internet Computing and Services
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• v.16 no.3
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• pp.33-41
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• 2015

In this paper, the simplification procedure of Karnaugh Map, which is essential to design digital logic circuits, was implemented as web-based educational Java applets. The learners will be able to experience interesting learning process by executing the proposed Java applets. In addition, since the proposed Java applets were designed to contain educational technologies by step-by-step procedure, the maximization of learning efficiency can be obtained. The learners can make virtual experiments on the simplification of digital logic circuits by clicking on some buttons or filling out some text fields. Furthermore, the Boolean expression and its schematic diagram occurred in the simplification process will be displayed on the separate frame so that the learners can learn effectively. The schematic diagram enables them to check out if the logic circuit is correctly connected or not. Finally, since the simplification algorithm used in the proposed Java applet is based on the modified Quine-McCluskey minimization technique, the proposed Java applets will show more encouraging result in view of learning efficiency if it is used as assistants of the on-campus offline class.

• Journal of Engineering Education Research
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• v.2 no.1
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• pp.10-16
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• 1999

In this paper, we developed the internet-based educational software package (DVLab) for design and virtual experiment of the digital logic circuits. The DVLab consists of the LogicSim module for design and simulation of digital combinational/sequantial logic circuits, micro-controller application circuits and the BreadBoard module for virtual experiment and the Theory module for lecture and the Report/ReportChecker module and some other utility modules. All developed modules can be run as application programs as well as applets in the Internet. The LogicSim and the BreadBoard support real time clock function, output verification function on the designed circuits, trace function of logic values, copy-protection function of designed circuits and provide various devices including logic gates, TTLs, LED, buzzer, and micro-controller. The educational model of digital logic circuit design and experiment using the DVLab is also presented in this paper.

• Korean Journal of Logic
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• v.15 no.3
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• pp.307-322
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• 2012

It is demonstrated that there is a simple, canonical way to show the independency of the Friedman-style miniaturization of Kruskal's theorem with respect to $(\prod_{2}^{1}-BI)_0$. This is done by a non-trivial combination of some well-known, non-trivial previous works concerning directly or indirectly the (proof-theoretic) strength of Kruskal's theorem.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.411-414
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• 2004

본 연구에서는 RPP(Randomized Pulse Position PWM)의 특징과 RSF(Random Switching Frequency PWM)의 특징을 모두 갖는 하이브리드 RPWM (Random PWM)기법을 제안하였다. 제안된 방법은 PRBS(Pseudo-Random Binary Sequence)로 동작하는 시프트 레지스터의 lead-lag 랜덤 비트를 사용한다는 점에서 종전의 방법과 동일하나, 이와 논리적인 비교를 위해 랜덤 주파수의 삼각파를 이용한다는 점에서 종전의 방법과 다르다. 본 연구의 타당성을 확인하기 위하여 인버터 기반의 3상 유도모터 구동시스템에 제안된 방법을 적용하였다. 그 결과 종전의 방법에 비하여 인버터 구동 유도모터의 전압 및 전류의 고조파 스펙트럼의 광 대역화에 탁월한 효과가 있음을 입증할 수 있었다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.5
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• pp.30-34
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• 1981

This paper deals with the testability evaluation method for the digital systems. This method uses two factors: the complexity and the accessibility. The complexity depends on the ratio in combinational and sequential circuits, number of input/output terminals, and the circuit count by using the gate input level method. The accessibility is how easily to handle the data from I/O terminals. The system testability has a normalized value. Thus, analyzing the testability evaluation, and redesigning the circuit to improve testability, the systems increase interests for the maintenance and have high reliability. Finally, in comparison with Stephenson and Grason's technique, this technique gives sufficiently accurate results for much less computation effort.

• Proceedings of the Korean Environmental Sciences Society Conference
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• 2003.11b
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• pp.70-76
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• 2003

최근 자연문화자원이 중요하게 인식되면서, 자연문화자원을 통한 특성단지개발을 추진하는 예가 많지만, 보전에 대한 규제만 있을 뿐 활용에 대한 가이드라인이 정해지지 않아 정책추진에 어려움을 겪는 예가 많다. 본 연구는 이러한 자연문화자원을 이용한 특정단지개발에 대한 문제 및 발전방안을 몇 가지 실사례를 통해 검토한 것에 있다. 사례조사결과 지방자치단체의 개발여건은 극히 복잡다단한 자원분포를 갖고 있고, 이들이 상호 연결되는 구조를 갖고 있어, 기존과 같이 자연생태도를 통해 일방적으로 개발적지를 정한다든가, 보전 범위를 500m로 설정하는 것과 같은 개발방식은 지역개발에 거의 도움을 주지 못하는 것으로 나타난다. 이러한 일기준 일거점의 개발논리보다는 모든 자원의 속성을 통해 최적의 보전범위를 정해가는 다거점 개발논리가 자원의 보전은 물론 활용에 있어서도 효과적인 것으로 판단된다. 이때 다거점에 대한 연출은 매우 복잡하게 작용하는 바 GIS를 통해 다거점을 조합해 가는 방식이 기술적 방안으로 제안된다.

• Journal of Korean Library and Information Science Society
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• v.52 no.2
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• pp.145-166
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• 2021

The study was aimed at verifying the effectiveness of Book-Coding reading education as a reader activity of older elementary school children at a time when high-dimensional thinking abilities were formed. To this end, 30 fifth-grade children of N Elementary School in N-si, Gyeonggi-do, comprised of 15 students from a reading education program using Book-Coding, and 15 students from a reading comprehension program, and applied the reading education program over a total of 12 sessions. The main results of the study are summarized as follows. First, when the effects of the convergence reading education program using Book-Coding on the logical thinking ability of the students in the upper grades in the elementary school were analyzed, all the six sub-factors of logical thinking ability, that is, conservation logic, proportional logic, variable controlling logic, probabilistic logic, correlational inference logic, and combinational logic, were proved to have statistically more meaningful difference than the group writing a book report. Second, the analysis result of the influence of the convergence reading education program using Book-Coding on the creativity of the students in the upper grades of the elementary school showed that all the 13 elements of curiosity, persistence, effectiveness, independence, adventurousness, openness, knowledge, imagination, originality, sensitivity, fluency, flexibility, and accuracy were statistically meaningfully different compared to the book report group. Third, when it was analyzed how the convergence reading education program using Book-Coding affected the creative personality of the elementary school students, all the six factors of curiosity, task commitment, independence, awareness of risk, and openness of thinking, and aesthetics were found out to have a statistically more meaningful difference than the group that wrote a book report.

• Journal of the Korean Institute of Telematics and Electronics
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• v.17 no.4
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• pp.31-37
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• 1980

In this paper, we are concerned with the problems of fault- detection for combinational logic networks. The method which we can obtain the complete test sets using propagation of primitive test sets is presented by considering the relation between test sets of each line. A new method is proposed that can detect the fault through the observation of the output variance by applying only the test sets equivalent to the number of inputs We found that the method is much improved compared to the conventional fault detecting procedure that requires applying the complete test sets to the logic networks.

• The Journal of the Acoustical Society of Korea
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• v.18 no.1
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• pp.45-52
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• 1999

In this thesis, a packer is proposed and designed for removing the bottle-neck effect and easy signal processing using a new algorithm with the operation frequency of 54MHz. To verify the performance of the proposed packer, DCT coefficient encoding block with ROM table using a combinational logic is designed and its output data are used the input data of the packer. Circuits in this thesis are designed by using VHDL code and its modeling and simulation are performed by SYNOPSYS tool using $0.65{\mu}m$ rule.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.6
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• pp.10-15
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• 1977

This paper proposes a simple and systematic method for the generation of the fault detection test sets for the combinational logic networks. Based on tile path sensitizing concept, the test patterns for the primary input gates of the network are defined, and then it is shown that, arranging these predefined test patterns according to the path sensitizing characteristics of the given network sturctures, the minimal complete test sets for the fan-out free combinational networks can be found easily. It is also shown that, taking into account the fan-out paths sensitizing compatibility, the proposed method can be extended to the irredundant reconvergent fan-out networks.