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Characteristics and Quality Control of Precipitable Water Vapor Measured by G-band (183 GHz) Water Vapor Radiometer (G-band (183 GHz) 수증기 라디오미터의 가강수량 특성과 품질 관리)

  • Kim, Min-Seong;Koo, Tae-Young;Kim, Ji-Hyoung;Jung, Sueng-Pil;Kim, Bu-Yo;Kwon, Byung Hyuk;Lee, Kwangjae;Kang, Myeonghun;Yang, Jiwhi;Lee, ChulKyu
    • Journal of the Korean earth science society
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    • v.43 no.2
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    • pp.239-252
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    • 2022
  • Quality control methods for the first G-band vapor radiometer (GVR) mounted on a weather aircraft in Korea were developed using the GVR Precipitable Water Vapor (PWV). The aircraft attitude information (degree of pitch and roll) was applied to quality control to select the shortest vertical path of the GVR beam. In addition, quality control was applied to remove a GVR PWV ≥20 mm. It was found that the difference between the warm load average power and sky load average power converged to near 0 when the GVR PWV increased to 20 mm or higher. This could be due to the high brightness temperature of the substratus and mesoclouds, which was confirmed by the Communication, Ocean and Meteorological Satellite (COMS) data (cloud type, cloud top height, and cloud amount), cloud combination probe (CCP), and precipitation imaging probe (PIP). The GVR PWV before and after the application of quality control on a cloudy day was quantitatively compared with that of a local data assimilation and prediction system (LDAPS). The Root Mean Square Difference (RMSD) decreased from 2.9 to 1.8 mm and the RMSD with Korea Local Analysis and Precipitation System (KLAPS) decreased from 5.4 to 4.3 mm, showing improved accuracy. In addition, the quality control effectiveness of GVR PWV suggested in this study was verified through comparison with the COMS PWV by using the GVR PWV applied with quality control and the dropsonde PWV.

Oxidation of Isopropyl Alcohol in Air by a Catalytic Plasma Reactor System (촉매-플라즈마 반응 시스템을 이용한 아이소프로필 알코올 산화)

  • Jo, Jin Oh;Mok, Young Sun
    • Applied Chemistry for Engineering
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    • v.25 no.5
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    • pp.531-537
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    • 2014
  • A catalytic plasma reactor was employed for the oxidation of isopropyl alcohol (IPA) classified as a volatile organic compound (VOC). Copper oxide (Cu : 0.5% (w/w)) supported on a multichannel porous ceramic consisting of ${\alpha}-Al_2O_3$ was used as a catalyst, which was directly exposed to the plasma created in it. The effects of discharge voltage and reaction temperature on the concentrations of IPA and its byproducts were examined to understand the behavior of the catalytic plasma reactor. Without thermal insulation, the reactor temperature increased up to $120^{\circ}C$ at an applied voltage of 17 kV (discharge power : 28 W), and the IPA at a flow rate of $1L\;min^{-1}$ ($O_2$ : 10% (v/v); IPA : 1000 ppm) was completely removed. At temperatures below $120^{\circ}C$, however, besides the desirable product $CO_2$, several unwanted byproducts such as acetone, formaldehyde and CO were also formed from IPA. On the other hand, when the reactor was thermally insulated, the plasma discharge increased the temperature up to $265^{\circ}C$ under the same condition and most of IPA was oxidized to $CO_2$. Without loading CuO on the ceramic support, the plasma discharge in the thermally insulated reactor produced nearly equal amounts of $CO_2$ and CO. On comparison, with the catalyst alone (temperature : $265^{\circ}C$), more than 70% of the removed IPA was simply converted into another type of VOC (acetone), indicating that the catalyst assisted by the plasma is more effective in the oxidation of IPA than that of the catalyst-alone process.

Preparation of Uniform Porous Carbon from Mesophase Pitch and Its Characteristics of Catalyst Support for the Direct Methanol Fuel Cell (메조페이스 핏치로부터 균질한 다공성 탄소 제조 및 이를 이용한 직접 메탄올 연료전지의 촉매 담지체 특성)

  • Nam, Ki-Don;Kim, Tae-Jin;Kim, Sang-Kyung;Lee, Byoung-Rok;Peck, Dong-Hyun;Ryu, Seung-Kon;Jung, Doo-Hwan
    • Applied Chemistry for Engineering
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    • v.17 no.2
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    • pp.223-228
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    • 2006
  • Pore-size controlled porous carbons for the catalyst supports of the direct methanol fuel cell were prepared from the mesophase pitch by using the silica spheres with different sizes. Pitch solution in THF and spheres were mixed, carbonized and etched by 5 M NaOH to make porous carbon. Specific surface area of the porous carbons was $14.7{\sim}87.7m^2/g$ and average pore diameter was 50~550 nm which were dependent on the size of silica spheres. Aqueous reduction method was used to load 60 wt% PtRu on the prepared porous carbon supports. The electro-oxidation activity of the supported 60 wt% Pt-Ru catalysts was measured by cyclic voltammetry and unit cell test. For the 60 wt% Pt-Ru/porous carbon synthesized by 50 nm silica, current density value in the cyclic voltammetry test was $123mA/cm^2$ at 0.4 V and peak power density in the unit cell test were 105 and $162mW/cm^2$ under oxygen at 60 and $80^{\circ}C$, respectively.

Growth of $CuGaSe_2$ single crystal thin film for solar cell development and its solar cell application (태양 전지용 $CuGaSe_2$ 단결정 박막 성장과 태양전지로의 응용)

  • Yun, Suk-Jin;Hong, Kwang-Joon
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.15 no.6
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    • pp.252-259
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    • 2005
  • Single crystal $CuGaSe_2$ layers were grown on thoroughly etched semi-insulating CaAs(100) substrate at $450^{\circ}C$ with hot wall epitaxy (HWE) system by evaporating $CuGaSe_2$ source at $610^{\circ}C$. The crystalline structure of the single crystal thin films was investigated by the photoluminescence (PL) and double crystal X-ray diffraction (DCXD). The carrier density and mobility of single crystal $CuGaSe_2$ thin films measured with Hall effect by Van der Pauw method are $4.87{\times}10^{17}cm^{-3}$ and $129cm^2/V{\cdot}s$ at 293 K, respectively. The temperature dependence of the energy band gap of the $CuGaSe_2$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)=1.7998eV-(8.7489{\times}10^{-4}eV/K)T^2/(T+335K)$. The voltage, current density of maxiumun power, fill factor, and conversion, efficiency of $n-CdS/p-CuGaSe_2$, heterojunction solar cells under $80mW/cm^2$ illumination were found to be 0.41 V, $21.8mA/cm^2$, 0.75 and 11.17%, respectively.

Wideband CMOS Voltage-Controlled Oscillator(VCO) for Multi-mode Vehicular Terminal (융복합 차량 수신기를 위한 광대역 전압제어 발진기)

  • Choi, Hyun-Seok;Diep, Bui Quag;Kang, So-Young;Jang, Joo-Young;Bang, Jai-Hoon;Oh, Inn-Yul;Park, Chul-Soon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.6
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    • pp.63-69
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    • 2008
  • Reconfigurable RF one-chip solutions have been researched with the objective of designing for smaller-sized and more economical RF transceiver and it can be applied to a vehicular wireless terminal. The proposed voltage-controlled oscillator satisfies the targeted frequency range ($4.2{\sim}5.4\;GHz$) and the frequency planning which correspond to the standards such as CDMA(IS-95), PCS, GSM850, EGSM, WCDMA, WLAN, Bluetooth, WiBro, S-DMB, DSRC, GPS, and DVB-H/DMB-H/L(L Band). In order to improve phase noise performance, PMOS is adopted in the cross-coupled pair, the tail current source and MOS varactor in this VCO and differential-typed switching is proposed in capacitor array. Based on the measurement results, a total power dissipation is $5.3{\sim}6.0\;mW$ at 1.8 V power supply voltage. The oscillator is tuned from 4.05 to 5.62 GHz; The tuning range is 33%. The phase noise is -117.16 dBc/Hz at 1 MHz offset frequency and the FOM (Figure Of Merit) is $-180.84{\sim}-180.5$.

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Multimedia Extension Instructions and Optimal Many-core Processor Architecture Exploration for Portable Ultrasonic Image Processing (휴대용 초음파 영상처리를 위한 멀티미디어 확장 명령어 및 최적의 매니코어 프로세서 구조 탐색)

  • Kang, Sung-Mo;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.8
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    • pp.1-10
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    • 2012
  • This paper proposes design space exploration methodology of many-core processors including multimedia specific instructions to support high-performance and low power ultrasound imaging for portable devices. To explore the impact of multimedia instructions, we compare programs using multimedia instructions and baseline programs with a same many-core processor in terms of execution time, energy efficiency, and area efficiency. Experimental results using a $256{\times}256$ ultrasound image indicate that programs using multimedia instructions achieve 3.16 times of execution time, 8.13 times of energy efficiency, and 3.16 times of area efficiency over the baseline programs, respectively. Likewise, programs using multimedia instructions outperform the baseline programs using a $240{\times}320$ image (2.16 times of execution time, 4.04 times of energy efficiency, 2.16 times of area efficiency) as well as using a $240{\times}400$ image (2.25 times of execution time, 4.34 times of energy efficiency, 2.25 times of area efficiency). In addition, we explore optimal PE architecture of many-core processors including multimedia instructions by varying the number of PEs and memory size.

Design of a High-Resolution Integrating Sigma-Delta ADC for Battery Capacity Measurement (배터리 용량측정을 위한 고해상도 Integrating Sigma-Delta ADC 설계)

  • Park, Chul-Kyu;Jang, Ki-Chang;Woo, Sun-Sik;Choi, Joong-Ho
    • Journal of IKEEE
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    • v.16 no.1
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    • pp.28-33
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    • 2012
  • Recently, with mobile devices increasing, as a variety of multimedia functions are needed, battery life is decreased. Accordingly the methods for extending the battery life has been proposed. In order to implement these methods, we have to know exactly the status of the battery, so we need a high resolution analog to digital converter(ADC). In case of the existing integrating sigma-delta ADC, it have not convert reset-time conversion cycle to function of resolution. Because of this reason, all digital values corresponding to the all number of bits will not be able to be expressed. To compensated this drawback, this paper propose that all digital values corresponding to the number of bits can be expressed without having to convert reset-time additional conversion cycle to function of resolution by using a up-down counter. The proposed circuit achieves improved SNDR compared to conventional converters simulation result. Also, this was designed for low power suitable for battery management systems and fabricated in 0.35um process.

Wideband Colpitts Voltage Controlled Oscillator with Nanosecond Startup Time and 28 % Tuning Bandwidth for Bubble-Type Motion Detector (나노초의 발진 기동 시간과 28 %의 튜닝 대역폭을 가지는 버블형 동작감지기용 광대역 콜피츠 전압제어발진기)

  • Shin, Im-Hyu;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1104-1112
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    • 2013
  • This paper presents a wideband Colpitts voltage controlled oscillator(VCO) with nanosecond startup time and a center frequency of 8.35 GHz for a new bubble-type motion detector that has a bubble-layer detection zone at the specific distance from itself. The VCO circuit consists of two parts; one is a negative resistance part with a HEMT device and Colpitts feedback structure and the other is a resonator part with a varactor diode and shorted shunt microstrip line. The shorted shunt microstrip line and series capacitor are utilized to compensate for the input reactance of the packaged HEMT that changes from capacitive values to inductive values at 8.1 GHz due to parasitic package inductance. By tuning the feedback capacitors which determine negative resistance values, this paper also investigates startup time improvement with the negative resistance variation and tuning bandwidth improvement with the reactance slope variation of the negative resistance part. The VCO measurement shows the tuning bandwidth of 2.3 GHz(28 %), the output power of 4.1~7.5 dBm and the startup time of less than 2 nsec.

Battery Level Calculation and Failure Prediction Algorithm for ESS Optimization and Stable Operation (ESS 최적화 및 안정적인 운영을 위한 배터리 잔량 산출 및 고장 예측 알고리즘)

  • Joo, Jong-Yul;Lee, Young-Jae;Park, Kyoung-Wook;Oh, Jae-Chul
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.1
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    • pp.71-78
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    • 2020
  • In the case of power generation using renewable energy, power production may not be smooth due to the influence of the weather. The energy storage system (ESS) is used to increase the efficiency of solar and wind power generation. ESS has been continuously fired due to a lack of battery protection systems, operation management, and control system, or careless installation, leading to very big casualties and economic losses. ESS stability and battery protection system operation management technology is indispensable. In this paper, we present a battery level calculation algorithm and a failure prediction algorithm for ESS optimization and stable operation. The proposed algorithm calculates the correct battery level by accumulating the current amount in real-time when the battery is charged and discharged, and calculates the battery failure by using the voltage imbalance between battery cells. The proposed algorithms can predict the exact battery level and failure required to operate the ESS optimally. Therefore, accurate status information on ESS battery can be measured and reliably monitored to prevent large accidents.

Fractional-N PLL Frequency Synthesizer Design (Fractional-N PLL (Phase-Locked Loop) 주파수 합성기 설계)

  • Kim Sun-Cheo;Won Hee-Seok;Kim Young-Sik
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.7 s.337
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    • pp.35-40
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    • 2005
  • This paper proposes a fractional-N phase-locked loop (PLL) frequency synthesizer using the 3rd order ${\Delta}{\sum}$ modulator for 900MHz medium speed wireless link. The LC voltage-controlled oscillator (VCO) is used for the good phase noise property. To reduce the lock-in time, a charge pump has been developed to control the pumping current according to the frequency steps and the reference frequency is increased up to 3MHz. A 36/37 fractional-N divider is used to increase the reference frequency of the phase frequency detector (PFD) and to reduce the minimum frequency step simultaneously. A 3rd order ${\Delta}{\sum}$ modulator has been developed to reduce the fractional spur VCO, Divider by 8 Prescaler, PFD and Charge pump have been developed with 0.25um CMOS, and the fractional-N divider and the third order ${\Delta}{\sum}$ modulator have been designed with the VHDL code, and they are implemented through the FPGA board of the Xilinx Spartan2E. The measured results show that the output power of the PLL is about -lldBm and the phase noise is -77.75dBc/Hz at 100kHz offset frequency. The minimum frequency step and the maximum lock-in time are 10kHz and around 800us for the maximum frequency change of 10MHz, respectively.