• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.3
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• pp.317-323
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• 1998

A synchronization is important element not only wire communication but also wireless communication. Especially, In SS(Spread Spectrum) communication method used GPS(Global Positioning System) synchronization is more important. A synchronous oscillator(SO) is a network which synchronizes, tracks, filter, amplifies and divides (if necessary) in a single process. Without an input signal, the SO is a free-running oscillator, oscillating at a frequency $w_0$, but phase changes $180^{\circ}$ within tracking range of SO. Therefore CPSO was used for this problem. The coherent phase synchronous oscillator(CPSO) is created by adding two external loops to the SO and has a wider tracking bandwidth and a zero-offset phase response (coherent) while maintaining the SO properties of high signal-to-rejection and fast frequency acquisition times. Therefore phase between input signal and output signal is synchronized. In this paper, GPS data recovery circuit has applied CPSO using front reference characters and has certified an excellent data recovery capability.

• Journal of Sensor Science and Technology
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• v.5 no.6
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• pp.25-34
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• 1996

In this paper, we have designed signal conditioning circuitry for piezoresistive pressure sensor. Signal conditioning circuitry consists of voltage reference circuit for sensor driving voltage and instrument amplifier for sensor signal amplification. Signal conditioning circuitry is simulated using HSPICE in a single poly double metal $1.5\;{\mu}m$ BiCMOS technology. Simulation results of band-gap reference circuit showed that temperature coefficient of $21\;ppm/^{\circ}C$ at the temperature range of $0\;{\sim}\;70^{\circ}C$ and PSRR of 80 dB. Simulation results of BiCMOS amplifier showed that dc voltage gain, offset voltage, CMRR, CMR and PSRR are outperformed to CMOS and Bipolar, but power dissipation and noise voltage were more improved in CMOS than BiCMOS and Bipolar. Designed signal conditioning circuitry showed high input impedance, low offset and good CMRR, therefore, it is possible to apply sensor and instrument signal conditioning circuitry.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10C
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• pp.1425-1432
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• 2004

Because of the high performance with the edge regions, the existing LSE(Least Square Estimation) method provides much better results than other methods. However, since it emphasizes not oがy edge components but also noise components, some part of interpolated images looks like unnatural. It also requires very high computational complexity and memory for implementation. We propose a new LSE interpolation method which requires much lower complexity and memory, but provides better performance than the existing method. To reduce the computational complexity, we propose and adopt a simple sample window and a direction detector to reduce the size of memory without blurring image. To prevent from emphasizing noise components, the hi-linear interpolation method is added in the LSE formula. The simulation results show that the proposed method provides better subjective and objective performance with love. complexity than the existing method.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.857-867
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• 2018

Active array radar is evolving into digital active array radar. Digital active array radar has many advantages for making several simultaneous radar beams from the digital receive data of each element. A digital-type transceiver(TR) module is suitable for this goal in radar. In this work, the design results of an L-band digital TR module are presented to verify the possibility of fabrication for a digital active array antenna. This L-band digital TR module consists of a gallium-nitride-type HPA to achieve a more than 350-W peak output power and one-chip transceivers that include a digital waveform generator and analog digital converter. The receiving gain was 47 dB, the noise figure was less than 2 dB, and the final output type of the four channel receiving paths was one optic signal.

• Korean Journal of Optics and Photonics
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• v.34 no.4
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• pp.151-156
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• 2023

We propose to implement cost-effectively a high-speed short-haul interconnect by transmitting a 200-Gb/s/λ two-channel optical time-division-multiplexed signal generated by a carrier-suppressed optical pulse, which improves the robustness of the multiplexed signal to chromatic dispersion. The multiplexed 200-Gb/s signal is generated in the transmitter by combining two 100-Gb/s 4-level pulse-amplitude-modulated signals (generated using the optical pulse and two Mach-Zehnder modulators). After the signal is transmitted over a fiber, it is amplified by a semiconductor optical amplifier and detected by a photodiode. The amplified spontaneous emission noise is eliminated by an optical band-pass filter. The transmitted signal is reconstructed by a 2 × 2 multiple-input multiple-output equalizer, which compensates for crosstalk. Due to the use of the carrier-suppressed optical pulse, the 200-Gb/s signal can be transmitted over fiber with a chromatic dispersion of 40 ps/nm.

• Transactions on Semiconductor Engineering
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• v.2 no.3
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• pp.1-5
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• 2024

This paper presents a crystal-less reference clock recovery (CR) frequency synthesizer with compensation designed for Bluetooth Low Energy (BLE) Smart-tag applications, operating at frequencies of 32, 72, and 80MHz. In contrast to conventional frequency synthesizers, the proposed design eliminates the need for external components. Using a single-ended antenna to receive a minimal input power of -36dBm at a 2.4GHz signal, the CR synthesizes frequencies by processing the RF signal received through a Low Noise Amplifier ( L N A ) . This approach allows the system to generate a reference clock without relying on a crystal. The received signal is amplified by the LNA and then input to a 16-bit ACC (Automatic Clock Compensation) circuit. The ACC compares the frequency of the received signal with the oscillator output signal, using the synthesis of a 32MHz reference clock through a frequency compensation method. The oscillator is constructed using a Ring Oscillator (RO) with a Frequency Divider, offering three different frequencies (32/72/80MHz) for various system components. The proposed frequency synthesizer is implemented using a 55-nm CMOS process.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.47-54
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• 2006

This work proposes a dual-channel 6b 1GS/s ADC for ultra wide-band communication system applications. The proposed ADC based on a 6b interpolated flash architecture employs wide-band open-loop track-and-hold amplifiers, comparators with a wide-range differential difference pre-amplifier, latches with reduced kickback noise, on-chip CMOS references, and digital bubble-code correction circuits to optimize power, chip area, and accuracy at 1GS/s. The ADC implemented in a 0.18um 1P6M CMOS technology shows a signal-to-noise-and-distortion ratio of 30dB and a spurious-free dynamic range of 39dB at 1GS/s. The measured differential and integral non-linearities of the prototype ADC are within 1.0LSB and 1.3LSB, respectively. The dual-channel ADC has an active area of $4.0mm^2$ and consumes 594mW at 1GS/s and 1.8V.

• Journal of Astronomy and Space Sciences
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• v.24 no.4
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• pp.349-366
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• 2007

We designed and developed a multi-purpose CCD camera system for three kinds of CCDs; KAF-0401E($768{\times}512$), KAF-1602E($1536{\times}1024$), KAF-3200E($2184{\times}1472$) made by KODAK Co.. The system supports fast USB port as well as parallel port for data I/O and control signal. The packing is based on two stage circuit boards for size reduction and contains built-in filter wheel. Basic hardware components include clock pattern circuit, A/D conversion circuit, CCD data flow control circuit, and CCD temperature control unit. The CCD temperature can be controlled with accuracy of approximately $0.4^{\circ}C$ in the max. range of temperature, ${\Delta}33^{\circ}C$. This CCD camera system has with readout noise $6\;e^-$, and system gain $5\;e^-/ADU$. A total of 10 CCD camera systems were produced and our tests show that all of them show passable performance.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.4
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• pp.34-40
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• 2004

In this paper, we have studied the OCT(Optical Coherence Tomography) system which has been advantages of high resolution, 2-D cross-sectional images, low cost and small size configuration. The characteristics of light source determine the resolution and coherence length. The light source has a commercial SLD with a central wavelength of 1,285 ill11, 35.3 nm(FWHM). The optical delay line is necessary to make equal with the optical path length to scattered light or reflected light from a sample. In order to make equal the optical path length, the stage that is attached to a reference mirror is controled by a step motor. And the interferometer is configured with the Michelson interferometer by using a single mode fiber, and the scanner can be focused on the sample by using a reference ann Also, the 2-dimension cross-sectional images were measured with scanning the transverse direction of the sample by using a step motor. After detecting the internal signal of lateral direction, a scanner is moved to obtain the cross-sectional image of 2-dimension by using step motor. A photodiode, which has high detection sensitivity and excellent noise characteristics has been used. The detected small signal has a noise and interference. After filtering and amplifying the signal, the output signal is demodulated the waveform And then, a cross-sectional image is seen through converting this signal into a digitalized signal by using an AID converter. The resolution of the sample is about 30${\mu}{\textrm}{m}$, which corresponds to the theoretical resolution. Also, the cross-sectional images of onion cells were measured in real time scheme.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.8
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• pp.42-50
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• 2007

This paper presents design methods for dual-frequency(2.4/5.8GHz) active receiving antennas. The proposed active receiving antennas are designed to interconnect the output port of a wideband antenna to the input port of an active device of High Electron Mobility Transistor directly and to receive RF signals of 2.4GHz and 5.2GHz simultaneously where the impedance matching conditions are optimized by adjusting the length of $1/20{\lambda}_0$(@5.8GHz) CPW transmission line in the planar antenna The bandwidth of implemented dual-frequency active receiving antennas is measured in the range of 2.0GHz to 3.1GHz and 5.25GHz to 5.9GHz. Gains are measured of 17.0dB at 2.4GHz and 15.0dB at 5.2GHz. The measured noise figure is 1.5dB at operating frequencies.