• Journal of Convergence for Information Technology
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• v.9 no.9
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• pp.38-43
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• 2019

In this paper, a method of inputting one analog input and two digital switch inputs by using one analog port of microcontroller embedded in IoT device was proposed. In this method, the upper limit and the lower limit of the input voltage range of the analog input port are determined, and the analog input voltage is input to this interval. The digital switches are configured to exceed the boundaries of the upper and lower limits, respectively. To verify the performance of the proposed method, an experimental circuit was constructed and tested using a microcontroller. As a result, all three inputs can be sensed using a single analog port, thus confirming that the three required input ports are reduced to one input port, ie, 33%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.11
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• pp.1687-1695
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• 2021

In this paper, it is designed and analyzed the beamforming antenna using the butler matrix. The operating frequency of the proposed beamforing antenna is ISM band of 2.4 GHz band and the component of the beamforing antenna consisted of a 1×4 array antenna and a 4×4 butler matrix. Each output port of 4×4 butler matrix outputs the signal having a different phase, it is provided to each input port of 1×4 array antenna. The beamforming antenna with four output ports forms a total of four beams. In order to analyze the radiation pattern of the beamforming antenna, it was provided by switching the signal to the input port and proceeded the Individual analysis for the input port 1 to 4. The main beams of the proposed beamforming antenna were formed in the -12°, 40°, -40° and 12° directions according to each input port, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.2
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• pp.65-71
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• 2011

This paper shows variations on bandwidth for the 5-microstrip 4-port structure by cutting out part of 2nd and 4th line of 5 lines. In 2nd line case, the bandwidth to pass is decreased by 300MHz and one of two input ports operates in diplexer. Both of 2nd and 4th line cut takes each of two input ports as a diplexer. The bandwidth for 4th line case has almost same bandwidth for the unmodified structure, a bit wider than that of the 2nd line case. Especially the isolation between input and other out port in center frequency of stop band shows 41dB for port 1, 32dB for port 2.

• Proceedings of the Korean Information Science Society Conference
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• 2001.10c
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• pp.412-414
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• 2001

본 논문은 초고속통신망에서 멀티캐스트 스위칭에서 발생될 수 있는 오버플로우 문제와 블로킹 문제를 보다 효율적으로 해결하고, 공정하게 입력포트에 접근함으로 작은 fanout에 대한 불공정성을 해결하기 위한 멀티캐스트 스위치를 제안하고자 한다. 제안된 스위치는 셀 분할(cell pre-splitting)과 공유된 버퍼, Group Spliiting, 그리고 그룹분할망으로 구성되어지며, 큰 fanout에 대한 작은 fanout을 가진 입력포트에 도착한 패킷의 불공정한 대우를 해결하여 시스템 전체 지연 시간을 줄여 산출량을 극대화할 수 있다.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.04a
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• pp.535-538
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• 2001

본 논문은 작은 fanout에 대한 불공정성과 hot-spot의 문제를 해결하기 위해 공정하게 입력포트에 접근하여 복사망으로 들어갈 수 있는 멀티캐스트 스위치를 제안하고자 한다. 제안된 스위치는 큰 fanout에 대한 작은 fanout을 가진 입력포트에 도착한 패킷의 불공정한 대우를 해결하여 시스템 전체 지연시간을 줄여 산출량을 극대화할 수 있다.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.2
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• pp.56-63
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• 2011

This paper presents the method of giving hysteresis characteristics to the digital input port of microprocessors or micro-controllers and it's design procedures. And this paper shows the example of circuit design and the effect of this method by experiments. Presented method has advantages : By the additional one port and two resistors, input port can have hysteresis characteristics and hysteresis band is larger than TTL, CMOS schmitt trigger gates.

• Journal of KIISE:Information Networking
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• v.30 no.1
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• pp.134-142
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• 2003

We present an ATM switch architectures based on the multistage interconnection network(MIN) for the efficient multicast traffic control. Many of these applications require multicast connections as well as point-to-point connections. Muiticast connection in which the same message is delivered from a source to arbitrary number of destinations is fundamental in the areas such as teleconferencing, VOD(video on demand), distributed data processing, etc. In designing the multicast ATM switches to support those services, we should consider the fairness(impartiality) and priority control, in addition to the overflow problem, cell processing with large number of copies, and the blocking problem. In particular, the fairness problem which is to distribute the incoming cells to input ports smoothly is occurred when a cell with the large copy number enters upper input port. In this case, the upper input port sends before the lower input port because of the calculating method of running sum, and therefore cell arrived into lower input port Is delayed to next cycle to be sent and transmission delay time becomes longer. In this paper, we propose the cell splitting and group splitting algorithm, and also the fairness scheme on the basis of the nonblocking characteristics for issuing appropriate copy number depending on the number of Input cell in demand. We evaluate the performance of the proposed schemes in terms of the throughput, cell loss rate and cell delay.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.394-397
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• 2003

In this paper, we describe the implementation of high performance buffer manager that is used in an advanced input-queued switch fabric. The designed buffer manager provides wire-speed cell/packet routing with low cost and tolerates the transmission pipeline latency of request and grant data. The buffer manager is implemented in a FPGA chip and supports the speed of OC-48c, 2.5Gbps per port.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.291-294
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• 2004

In this paper, we consider the broadcast switch architecture for hish performance multicast packet switching. In input and output buffered switch, we propose a new switch architecture which supports high throughput in broadcast packet switching with switch planes of single input and multiple output crossbars. The proposed switch architecture has a central arbiter that arbitrates requests from plural input ports and generates multiple grant signals to multiple output ports in a packet transmission slot. It provides high speed pipelined arbitration and large scale switching capacity.

• Proceedings of the Korean Society of Computer Information Conference
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• 2012.07a
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• pp.19-21
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• 2012

본 논문에서는 최근 많은 관심을 받고 있는 스마트 기기를 이용하여 개인의 포트폴리오를 효율적으로 관리 할 수 있는 방법을 소개 하고자 한다. 자신의 정보(인적사항)를 간단하게 보여주고, 주기적으로 활동 사항 및 자격증, 수상내역 등을 스마트폰을 이용하여 그 자리에서 입력을 할 수 있어 언제 무슨 활동을 했는지, 무슨 자격증을 취득 했는지를 바로 볼 수 있다. 안드로이드 운영체제를 이용하여 간단한 자기소개에 관한 틀을 만들어 쉽게 입력할 수 있게 구현했으며, 활동내역 및 자격증을 보기 쉽게 관리하기 위해 그룹별로 입력할 수 있게 구현하였다.