• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.18 no.6
• /
• pp.1-10
• /
• 2019

Traffic Signal Evaluation HILS is a system designed to evaluate a traffic signal system, and has a function of driving that simulates a real environment using a simulator that simulates a real traffic signal environment and an LCS that simulates a traffic signal controller. This study simulates the function of the traffic signal controller and is designed for design the LCS which is connected to the center system and the traffic simulator (VISSIM). The design of the LCS program uses a portable python language, and the code is designed in two versions running on Windows in the PC environment and unning on embedded environment, with a slight modification of the code. In this study, we analyzed the limitations of using LCS on Windows in PC environment and confirmed the ease of simulation Linux in embedded environment at large capacity.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.10
• /
• pp.1873-1878
• /
• 2017

Recently, many researches have been conducted on the aviation industry to replace the wire harness cable between the avionics of the aircraft with the wireless network. In this paper, we present an Event-Based Simulator for Wireless Avionics Intra-Communications (ES-WAIC) that can verify core technologies of wireless networks and efficiently integrate different layers of the network. ES-WAIC is developed to enhance the readability between the real time control application developers of the higher layer and the network layer developers. Specifically, the practical implement relies on an event-based programming concept to increase portability and compatibility that can be applied to the realistic low-power wireless embedded networks. ES-WAIC implements the overall system layers including the wireless channel modeling of the 4.4GHz band, the physical layer, the medium access control, the network, and the application layer of wireless avionics intra-communications.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.32 no.9A
• /
• pp.931-939
• /
• 2007

This paper describes the system which automatically generates instruction-set simulators cores using the SMDL. SMDL describes structure and instruction-set information of a target DSP machine. Analyzing behavioral information of each pipeline stage of all instructions on a target ASIPS, the proposed system automatically generates a cycle-accurate instruction set simulator in C++ for a target processor. The proposed system has been tested by generating instruction-set simulators for ARM9E-S, ADSP-TS20x, and TMS320C2x architectures. Experiments were performed by checking the functions of the $4{\times}4$ matrix multiplication, 16-bit IIR filter, 32-bit multiplication, and the FFT using the generated simulators. Experimental results show the functional accuracy of the generated simulators.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.47 no.5
• /
• pp.35-40
• /
• 2010

NAND flash memory has been widely used than traditional HDD in PDA and other mobile devices, embedded systems, PC because of faster access speed, low power consumption, vibration resistance and other benefits. DiskSim and other HDD simulators has been developed that for find improvements for the software or hardware. But there is a few Linux-based simulators for NAND flash memory and SSD. There is necessary for Windows-based NAND flash simulator because storage devices and PC using Windows. This paper describe for development of simulator-NFSim for FTL performance analysis in NAND flash. NFSim is used to measure performance of various FTL algorithms and FTL wear-level. NAND flash memory model and FTL algorithm developed using Windows Driver Model and class for scalability. There is no need for another tools because NFSim using graph tool for data measure of FTL performance.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.11 no.1
• /
• pp.39-46
• /
• 2016

According to general architecture of flight simulator made up of several independent rendering display systems, display synchronization problem between them naturally happens. In addition, since the flight simulator is usually implemented in the same networks where network delay is not big concern, it is necessary to consider different factors of existing synchronization technique. Among them, in this paper, we propose a new display synchronization scheme for flight simulator where each system has different rendering capacity. In the proposed scheme, each system is synchronized by considering maximum and minimum frames per second (FPS) while considering level of detail and latency. Also, experimental results are given to demonstrate the suitability of the proposed scheme for display synchronization scheme.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.4 no.2
• /
• pp.90-96
• /
• 2009

In the original model-based paradigm in the field of motion planning of robots, robots had to play the focal role of considering all situations under which they made decisions and operate. Such paradigm makes it difficult to respond efficiently to the dynamically shifting environment such as disaster area. In order to handle such a situation that may be changed dynamically, a technology that allows a dynamic execution of data transmission and physical/network connection between multiple robots based on scenarios is required. In this paper, we deal with evolutionary robots that adapt to any given environment and execute scenarios, specially focused on the development of a simulator to test the evolutionary process of cooperated multiple robots.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.9 no.1
• /
• pp.11-16
• /
• 2014

When it comes to develop flight simulator, HAT (Height Above Terrain) is required to provide altitude information to the pilot who learns how to control an airplane in landing and takeoff situation. However, there might be inconsistent problem between real terrain and simulation information since current implementation of HAT simply depends on center of gravity point on the airplane. To overcome mentioned problem, in this paper, we propose how to obtain more accurate altitude information than existing scheme by making use of HAT and HOT (Height Of Terrain) information of landing equipments according to movement of the airplane. Moreover, we demonstrate the accuracy of the proposed scheme through new flight simulator developed through OSG(OpenSceneGraph) by taking example of terrain information for domestic airport.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.9 no.2
• /
• pp.61-66
• /
• 2014

Temporal disappearance of weather phenomena effect is frequently observed in flight simulator when large volume of terrain data are processed. This problem was solved by employing culling scheme at static ratio in the existing scheme. However, since this approach causes the irregular rendering speed according to volume of data, it is necessary to develop a new culling scheme to maintain steady rendering speed by adjusting the culling ratio dynamically. In this paper, we propose a new culling scheme to make use of distance of the visibility to determine culling ratio depending on volume of terrain data. The experimental results show that rendering speed is preserved by the proposed scheme without affecting the visuality at rendering the scene and weather phenomena effect together.

• Proceedings of the Korean Information Science Society Conference
• /
• 2012.06b
• /
• pp.77-79
• /
• 2012

본 논문에서는 임베디드 시스템으로의 적용을 위한 균형이진트리 방식의 허프만 코딩 복호화 방법에 대하여 논한다. 그리고 구현된 전체 시스템의 간단한 코드 최적화(code optimization)를 추가하여 시스템 전체의 처리 속도를 감소시키고자 하였다. 본문에서는 구현된 복호화 성능 향상의 정확한 측정을 위하여 하드웨어 시뮬레이터를 사용했다. 이를 통해서 실질적인 환경에서 어느 정도의 duration으로 동작될 수 있는지, 그리고 해당 환경에서 얼마나 성능을 향상시킬 수 있을지를 비교적 정확하게 판단할 수 있도록 했다. 본문의 마지막에 명시된 대로, 최적화의 결과로, 허프만 코드를 표에서 찾는 기존의 방법에 비하여, 복호화 부분과 복호화 부분을 제외한 시스템 코드 최적화 각각 36%, 2%의 duration 횟수의 감소를 확인할 수 있었다.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.5 no.1
• /
• pp.1-6
• /
• 2010

본 논문에서는 네트워크 온 칩(NoC: network on chip) 구조에서의 내부 데이터 통신의 성능을 최적화 할 수 있는 새로운 온 칩 네트워크 인터페이스 구조를 제안하였다. 제안하는 NoC 구조는 기본적으로 하드웨어 면적을 줄이기 위하여 XY 라우팅 알고리듬을 기반으로 구현되었으며, 전달되는 패킷의 크기 또는 플릿의 개수를 최소화하기 위하여 Golomb-Rice 인코딩/디코딩 알고리듬에 기반을 둔 하드웨어 압축기/해제기를 이용하여 통신되는 데이터의 양을 크게 줄임으로써 네트워크 지연시간을 최소화 할 수 있는 새로운 구조를 제안하였다. 즉 전송될 데이터는 전송자(sender)의 네트워크 인터페이스에서 내장된 하드웨어 인코더를 통해 압축된 형태로 패킷의 개수를 최소화하여 온 칩 네트워크상의 데이터를 업로드하게 된다. 이러한 압축된 데이터가 리시버(receiver)에 도착하면, 하드웨어 디코더를 통해서 원래의 데이터로 복원된다. 사이클 수준의 시뮬레이터를 통하여 제안된 라우터 구조가 온 칩 시스템의 네트워크 지연시간을 크게 줄일 수 있음을 증명하였다.