• Title/Summary/Keyword: 연산 효율

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Spatially Scalable Kronecker Compressive Sensing of Still Images (공간 스케일러블 Kronecker 정지영상 압축 센싱)

  • Nguyen, Canh Thuong;Jeon, Byeungwoo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.10
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    • pp.118-128
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    • 2015
  • Compressive sensing (CS) has to face with two challenges of computational complexity reconstruction and low coding efficiency. As a solution, this paper presents a novel spatially scalable Kronecker two layer compressive sensing framework which facilitates reconstruction up to three spatial resolutions as well as much improved CS coding performance. We propose a dual-resolution sensing matrix based on the quincunx sampling grid which is applied to the base layer. This sensing matrix can provide a fast-preview of low resolution image at encoder side which is utilized for predictive coding. The enhancement layer is encoded as the residual measurement between the acquired measurement and predicted measurement data. The low resolution reconstruction is obtained from the base layer only while the high resolution image is jointly reconstructed using both two layers. Experimental results validate that the proposed scheme outperforms both conventional single layer and previous multi-resolution schemes especially at high bitrate like 2.0 bpp by 5.75dB and 5.05dB PSNR gain on average, respectively.

Program Plagiarism Detection based on X-treeDiff+ (X-treeDiff+ 기반의 프로그램 복제 탐지)

  • Lee, Suk-Kyoon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.4
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    • pp.44-53
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    • 2010
  • Program plagiarism is a significant factor to reduce the quality of education in computer programming. In this paper, we propose the technique of identifying similar or identical programs in order to prevent students from reckless copying their programming assignments. Existing approaches for identifying similar programs are mainly based on fingerprints or pattern matching for text documents. Different from those existing approaches, we propose an approach based on the program structur. Using paring progrmas, we first transform programs into XML documents by representing syntactic components in the programs with elements in XML document, then run X-tree Diff+, which is the change detection algorithm for XML documents, and produce an edit script as a change. The decision of similar or identical programs is made on the analysis of edit scripts in terms of program plagiarism. Analysis of edit scripts allows users to understand the process of conversion between two programs so that users can make qualitative judgement considering the characteristics of program assignment and the degree of plagiarism.

An Efficient Data-reuse Deblocking Filter Algorithm for H.264/AVC (H.264/AVC 비디오 코덱을 위한 효율적인 자료 재사용 디블록킹 필터 알고리즘)

  • Lee, Hyoung-Pyo;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.6
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    • pp.30-35
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    • 2007
  • H.264/AVC provides better quality than other algorithms by using a deblocking filter to remove blocking distortion on block boundary of the decoded picture. However, this filtering process includes lots of memory accesses, which cause delay of overall decoding time. In this paper, we propose a data-reuse algorithm to speed up the process for the deblocking filter. To reuse the data, a new filtering order is suggested. By using this order, we reduce the memory access and accelerate the deblocking filter. The modeling of proposed algorithm is compiled under ARM ADS1.2 and simulated with Armulator. The results of the experiment compared with H.264/AVC standard are achieved on average 58.45% and 57.93% performance improvements at execution cycles and memory access cycles, respectively.

A Design of Low Power Digital Matched Filter using Rounding for IMT-2000 Communication Systems (IMT-2000 통신시스템에서의 라운딩을 이용한 저전력 디지털 정합필터의 설계)

  • Park, Ki-Hyun;Ha, Jin-Suk;Nam, Ki-Hun;Cha, Jae-Sang;Lee, Kwang-Youb
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.145-151
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    • 2004
  • For wide-band spread spectrum communication systems such as IMT-2000, a digital matched filter is a key device for rapid spreading code synchronization. Although a digital matched filter can be implemented easily, large power consumption at the higher chip rate and large summation delay of longer chip length are the bottleneck of practical use. In this paper, we propose a optimized partial correlation digital matched filter structure which can be constructed of the so-called generalized hierarchical Golay sequence. a partial correlation structure can reduce the number of correlators, but enlarge the size of flip-flops. In this paper, The proposed approach focuses on efficient circuit size, power dissipation, maintaining the operating throughput. A proposed digital matched filter reduce the size of flip-flops by rounding method. and it reduces about 45 percentages of power dissipation and chip area as compared with digital matched filter which is not rounded. rounding. The proposed architecture was verified by using Xilinx FPGA.

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Spatial Data Structure for Efficient Representation of Very Large Sparse Volume Data for 3D Reconstruction (3차원 복원을 위한 대용량 희소 볼륨 데이터의 효율적인 저장을 위한 공간자료구조)

  • An, Jae Pung;Shin, Seungmi;Seo, Woong;Ihm, Insung
    • Journal of the Korea Computer Graphics Society
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    • v.23 no.3
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    • pp.19-29
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    • 2017
  • When a fixed-sized memory allocation method is used for sparse volume data, a considerable memory space is in general wasted, which becomes more serious for a large volume of high resolution. In this paper, in order to reduce such unnecessary memory consumption, we propose a volume representation method to store mostly voxels that represent valid information rather than all voxels in a fixed volume space. Then our method is compared with the conventional static memory allocation method, an octree-based representation, and a voxel hashing method in terms of memory usage and computation speed. In particular, we compare the proposed method and the voxel hashing method with respect to implementation of the GPU-based Marching Cubes algorithm.

Low-power Structure for H.264 Deblocking Filter (H.264용 디블로킹 필터의 저전력 구조)

  • Jang Young-Beom;Oh Se-Man;Park Jin-Su;Han Kyu-Hoon;Kim Soo-Hong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.43 no.3 s.309
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    • pp.92-99
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    • 2006
  • In this paper, a low-power deblocking filter structure for H.264 video coding algorithm is proposed. By sharing addition hardware for common filter coefficients, we have designed an efficient deblocking filter structure. Proposed deblocking filter utilizes MUX and DEMUX circuits for input data sharing and shows 44.2% reduction for add operation. In the HDL coding simulation and FPGA implementation, we achieved 19.5% and 19.4% gate count reduction, respectively, comparison with the conventional deblocking filter structure. Due to its efficient processing scheme, the proposed structure can be widely used in H.264 encoding and decoding SoC.

Genealogy grouping for services of message post-office box based on fuzzy-filtering (퍼지필터링 기반의 메시지 사서함 서비스를 위한 genealogy 그룹화)

  • Lee Chong-Deuk;Ahn Jeong-Yong
    • Journal of the Korean Institute of Intelligent Systems
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    • v.15 no.6
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    • pp.701-708
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    • 2005
  • Structuring mechanism, important to serve messages in post-office box structure, is to construct the hierarchy of classes according to the contents of message objects. This Paper Proposes $\alpha$-cut based genealogy grouping method to cluster a lot of structured objects in application domain. The proposed method decides the relationship first by semantic similarity relation and fuzzy relation, and then performs the grouping by operations of search( ), insert() and hierarchy(). This hierarchy structure makes it easy to process group-related processing tasks such as answering queries, discriminating objects, finding similarities among objects, etc. The proposed post-office box structure may be efficiently used to serve and manage message objects by the creation of groups. The Proposed method is tested for 5500 message objects and compared with other methods such as non-grouping, BGM, RGM, OGM.

IEEE 802.15.4a based Localization Algorithm for Location Accuracy Enhancement in the NLOS Environment (실내 NLOS환경에서 정밀도 향상을 위한 IEEE 802.15.4a 기반의 위치추정 알고리즘)

  • Cha, Jae-Young;Kong, Young-Bae;Choi, Jeung-Won;Ko, Jong-Hwan;Kwon, Young-Goo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1789-1798
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    • 2012
  • IEEE 802.15.4a standard can provide a variety of location-based services for ZigBee or wireless network applications by adapting the time-of-arrival (TOA) ranging technique. The non-line-of-sight (NLOS) condition is the critical problem in the IEEE 802.15.4a networks, and it can significantly degrade the performance of the TOA-based localization. To enhance the location accuracy due to the NLOS problem, this paper proposes an energy-efficient low complexity localization algorithm. The proposed approach performs the ranging with the multicast method, which can reduce the message overhead due to packet exchanges. By limiting the search region for the location of the node, the proposed approach can enhance the location accuracy. Experimental results show that the proposed algorithm outperforms previous algorithms in terms of the energy consumption and the localization accuracy.

Implementation of High-Speed Fresnelet Transform using Daubechies's Filter (드뷔시 필터를 이용한 고속 프레넬릿 변환의 구현)

  • Seo, Young-Ho;Lee, Yoon-Hyuk;Kim, Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.4
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    • pp.820-828
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    • 2017
  • Service of digital hologram that has been recognized as a visual system for next generation requires various signal processing technologies. A transform is the most frequently used tool among signal processing techniques for 2-dimensional(D) and 3-D natural picture. A digital hologram has totally different property with a natural picture, so it is rarely efficient to apply transform tools used in 2-D image processing to a digital hologram. To overcome this a Fresnelet transform for a digital hologram has been proposed. We derive a Fresnelet transform by using the Daubechie's filter after applying an unitary Fresnel transform to a wavelet basis function. We also implement the transform as types of device and kernel code to improve operational performance. In consideration of the average time that is required for a pixel we can have observed the performance is improved up to 242 and 30 times for using the (9,7) and (5,3) filters in case of using device code.

A Study on the Pixel-Parallel Usage Processing Using the Format Converter (포맷 변환기를 이용한 화소-병렬 화상처리에 관한 연구)

  • Kim, Hyeon-Gi;Lee, Cheon-Hui
    • The KIPS Transactions:PartA
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    • v.9A no.2
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    • pp.259-266
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    • 2002
  • In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM (or SRAM) cell. Layout pitch of one-bit-wide logic is Identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1) simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.