• Title/Summary/Keyword: 신호전류

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The Design and Fabrication of Conversion Layer for Application of Direct-Detection Type Flat Panel Detector (직접 검출형 평판 검출기 적용을 위한 변환층 설계 및 제작)

  • Noh, Si-Cheol;Kang, Sang-Sik;Jung, Bong-Jae;Choi, Il-Hong;Cho, Chang-Hoon;Heo, Ye-Ji;Yoon, Ju-Seon;Park, Ji-Koon
    • Journal of the Korean Society of Radiology
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    • v.6 no.1
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    • pp.73-77
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    • 2012
  • Recently, Interest to the photoconductor, which is used to flat form X-ray detector such as a-Se, $HgI_2$, PbO, CdTe, $PbI_2$ etc. is increasing. In this study, the film layer by using the photoconductive material with particle sedimentation was fabricated and evaluated. The quantization efficiency of the continuous X-ray with the 70 kVp energy bandwidth was analyzed by using the Monte Carlo simulation. With the results, the thickness of film with 64 % quantization efficiency was 180 ${\mu}m$ which is similar to the efficiency of 500 ${\mu}m$ a-Se film. And $HIg_2$ film has the high quantization efficiency of 74 % on 240 ${\mu}m$ thickness. The electrical characteristics of the 239 ${\mu}m$ $Hgl_2$ films produced by particle sedimentation were shown as very low dark current(under 10 $pA/mm^2$), and high sensitivity(19.8 mC/mR-sec) with 1 $V/{\mu}m$ input voltage. The SNR, which is influence to the contrast of X-ray image, was shown highly as 3,125 in low driving voltage on 0.8 $V/{\mu}m$. With the results of this study, the development of the low-cost, high-performance image detector with film could be possible by replacing the film produced by particle sedimentation instead to a-Se detector.

AC-DC Transfer Characteristics of a Bi-Sb Multijunction Thermal Converter (Bi-Sb 다중접합 열전변환기의 교류-직류 변환 특성)

  • 김진섭;이현철;함성호;이종현;이정희;박세일;권성원
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.11
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    • pp.46-54
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    • 1998
  • A planar Bi-Sb multijunction thermal converter, which is consisted of a linear or bifilar thin film NiCr-heater and a thin film Bi-Sb thermopile, has been fabricated, and its ac-dc transfer characteristics were examined in a frequency range from 10 Hz to 10 KHz. In order to increase the thermal sensitivity and to decrease the ac-dc transfer error of a thermal converter, the heater and the hot junctions of a thermopile were prepared on a Si$_3$N$_4$/SiO$_2$/Si$_3$N$_4$-diaphragm which acts as a thermal isolation layer, and the cold junctions on the Si$_3$N$_4$/SiO$_2$/Si$_3$N$_4$-thin film supported with the silicon rim which functions as a heat sink. The respective thermal sensitivities in air and in a vacuum of the converter with a built-in bifilar heater were about 14.0 ㎷/㎽ and 54.0 ㎷/㎽, and the ac-dc voltage and the current transfer difference ranges in air were about $\pm$0.60 ppm and $\pm$0.11 ppm, respectively, indicating that the ac-dc transfer accuracy of the converter are much higher than that of a commercial 3-dimensional multijunction thermal converter. However, the output thermoelectric voltage fluctuation of the converter was rather high.

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A 10b 100 MSample/s $1.4\;mm^2$ 56 mW 0.18 urn CMOS A/D Converter for Low-Power Multimedia Applications (저전력 멀티미디어 응용을 위한 10b 100 MSample/s $1.4\;mm^2$ 56 mW 0.18 um CMOS A/D 변환기)

  • Min Byoung-Han;Park Hee-Won;Chae Hee-Sung;Sa Doo-Hwan;Lee Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.53-60
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    • 2005
  • This work proposes a 10b 100 MS/s $1.4\;mm^2$ CMOS ADC for low-power multimedia applications. The proposed two-step pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The wide-band SHA employs a gate-bootstrapping circuit to handle both single-ended and differential inputs with 1.2 Vp-p at 10b accuracy while the second-stage flash ADC employs open-loop offset sampling techniques to achieve 6b resolution. A 3-D fully symmetrical layout reduces the capacitor and device mismatch of the first-stage MDAC. The low-noise references are integrated on chip with optional off-chip voltage references. The prototype 10b ADC implemented in a 0.18 um CMOS shows the maximum measured DNL and INL of 0.59 LSB and 0.77 LSB, respectively. The ADC demonstrates the SNDR of 54 dB, the SFDR of 62 dB, and the power dissipation of 56 mW at 100 MS/s.

Electrical Behavior of the Circuit Screen-printed on Polyimide Substrate with Infrared Radiation Sintering Energy Source (열소결로 제작된 유연기판 인쇄회로의 전기적 거동)

  • Kim, Sang-Woo;Gam, Dong-Gun;Jung, Seung-Boo
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.3
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    • pp.71-76
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    • 2017
  • The electrical behavior and flexibility of the screen printed Ag circuits were investigated with infrared radiation sintering times and sintering temperatures. Electrical resistivity and radio frequency characteristics were evaluated by using the 4 point probe measurement and the network analyzer by using cascade's probe system, respectively. Electrical resistivity and radio frequency characteristics means that the direct current resistance and signal transmission properties of the printed Ag circuit. Flexibility of the screen printed Ag circuit was evaluated by measuring of electrical behavior during IPC sliding test. Failure mode of the Ag printed circuits was observed by using field emission scanning electron microscope and optical microscope. Electrical resistivity of the Ag circuits screen printed on Pl substrate was rapidly decreased with increasing sintering temperature and durations. The lowest electrical resistivity of Ag printed circuit was up to $3.8{\mu}{\Omega}{\cdot}cm$ at $250^{\circ}C$ for 45 min. The crack length arisen within the printed Ag circuit after $10{\times}10^4$ sliding numbers was 10 times longer than that of after $2.5{\times}10^4$ sliding numbers. Measured insertion loss and calculated insertion loss were in good agreements each other. Insertion loss of the printed Ag circuit was increased with increasing the number of sliding cycle.

Experimental Study on Temperature-Moisture Combined Measurement System for Slope Failure Monitoring (사면붕괴 모니터링에 사용되는 온도-함수비 복합계측시스템 개발에 관한 실험적 연구)

  • Nam, Jin-Won
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.19 no.2
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    • pp.33-39
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    • 2015
  • Recently, the event of slope failure has been occurring frequently due to rapid climate changes and broad development of infrastructures, and the research for establishment of monitoring and prevention system has been an attentive issue. The major influence factors of slope failure mechanism can be considered moisture and temperature in soil, and the slope failure can be monitored and predicted through the trend of moisture-temperature change. Therefore, the combined sensing technology for the continuous measurement of moisture-temperature with different soil depths is needed for the slope monitoring system. The various independent sensors for each item (i.e. temperature and moisture respectively) have been developed, however, the research for development of combined sensing system has been hardly carried out. In this study, the high-fidelity sensor combing temperature-moisture measurement by using the minimized current consuming temperature circuit and the microwave emission moisture sensor is developed and applied on the slope failure monitoring system. The feasibility of developed monitoring system is verified by various experimental approaches such as standard performance test, mockup test and long-term field test. As a result, the developed temperature-moisture combined measurement system is verified to be measuring and monitoring the temperature and moisture in soil accurately.

A Time Comparison Measurement Technique for eLoran Receivers (시각비교를 위한 eLoran 수신기 지연측정 기술)

  • Lee, Chang-Bok;Lee, Jong-Koo;Lee, Young-Kyu;Hwang, Sang-wook;Yang, Sung-Hoon
    • Journal of Navigation and Port Research
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    • v.40 no.6
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    • pp.385-390
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    • 2016
  • ELoran Systems can provide Position, Navigation, and Time services with comparable performance to Global Positioning Systems (GPS) as a back up or alternative system. High timing and navigation performance can be achieved by eLoran signals because eLoran receivers use "all-in-view" reception. This incorporates Time of Arrival (TOA) signals from all stations in the service range because each eLoran station is synchronized to Coordinated Universal Time (UTC). Transmission station information and the differential Loran correction data are transmitted via an additional Loran Data Channel (LDC) on the transmitted eLoran signal such that eLoran provides improved Position Navigation and Timing (PNT) over legacy Loran. In this paper, we propose a technique for adapting the delay time compensation values in eLoran timing receivers to provide precise time comparison. For this purpose, we have designed a system that measures time delay from the crossing point of the third cycle extracted from the current transformer at the end point of the transmitter. The receiver delay was measured by connecting an active H-field, an E-field and a passive loop antenna to a commercial eLoran timing receiver. The common-view time transfer technique using the calibrated eLoran timing receiver improved the eLoran transfer time. A eLoran timing receiver calibrated by this method can be utilized in the field for precise time comparison as a GNSS backup.

Laterally Constrained Inversion of GREATEM data (지상 송신원 항공 전자탐사 자료의 횡적 제한 역산)

  • Cho, In-Ky;Jang, Je-Hun;Yi, Myeong-Jong;Rim, Hyoung-Rae
    • Geophysics and Geophysical Exploration
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    • v.20 no.1
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    • pp.33-42
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    • 2017
  • Recently, the grounded electrical-source airborne transient electromagnetic (GREATEM) system with high power source was introduced to achieve deeper investigation depth and to overcome high noise level. Although the GREATEM is a transient electromagnetic system using a long grounded wire as the transmitter, GREATEM data have been interpreted with 1D earth models because 2D or 3D modeling and inversion of vast airborne data are complicated and expensive to calculate. Generally, 1D inversion is subsequently applied to every survey point and combining 1D images together forms the stitched conductivity-depth image. However, the stitched models often result in abrupt variations in neighboring models. To overcome this problem, laterally constrained inversion (LCI) has been developed in inversion of ATEM data, which can yield layered sections with lateral smooth transitions. In this study, we analysed the GREATEM data through 1D numerical modeling for a curved grounded wire source. Furthermore, we developed a laterally constrained inversion scheme for continuous GREATEM data based on a layered earth model. All 1D data sets and models are inverted as one system, producing layered sections with lateral smooth transitions. Applying the developed LCI technique to the GREATEM data, it was confirmed that the laterally constrained inversion can provide laterally smooth model sections that reflect the layering of the survey area effectively.

Characteristics of Mineral Mg Dissolving Sensor in Edible Water using GMR-SV Device (거대자기저항 스핀밸브 소자를 이용한 음용수 미네랄 Mg 용해센서 특성 연구)

  • Lee, Ju-Hee;Kim, Da-Woon;Kim, Min-Ji;Park, Kwang-Seo;Kang, Joon-Ho;Lee, Sang-Suk
    • Journal of the Korean Magnetics Society
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    • v.18 no.5
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    • pp.174-179
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    • 2008
  • The measurement dissolution sensor system using GMR-SV device with magnetic sensitivity of 0.8 %/Oe and Mg-film thick of 200 nm and Mg-foil thick of 50 mm was fabricated and characterized. During the water dissolving process of Mg-film and Mg-foil, the subtle variation of magnetic field by the decrease of current in solenoid was detected by the GMR-SV sensor. The variations of Mg bubble number and ORP as a function of time for three different kinds of edible, tap, and distilled water, are measured and compared. A After 45 min, the speed of fast dissolving Mg was shown the order of edible > tap > DI water. The variation of output magnetoresistance as a function of dissolved time of Mg-film and Mg-foil for edible water, which is composed of mineral content of $0.8{\sim}5.4\;mg/l$ was investigated. The response times for the dissolution in edible water were 5 min and 20 min, respectively. From the measurement of dissolving time and speed for Mg-film and Mg-foil using GMR-SV device, the mineral Mg sensor system in edible water can be possible to develop.

Design of a 2.5V 300MHz 80dB CMOS VGA Using a New Variable Degeneration Resistor (새로운 가변 Degeneration 저항을 사용한 2.5V 300MHz 80dB CMOS VGA 설계)

  • 권덕기;문요섭;김거성;박종태;유종근
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.9
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    • pp.673-684
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    • 2003
  • A degenerated differential pair has been widely used as a standard topology for digitally programmable CMOS VGAs. A variable degeneration resistor has been implemented using a resistor string or R-2R ladder with MOSFET switches. However, in the VGAs using these conventional methods, low-voltage and high-speed operation is very hard to achieve due to the dc voltage drop over the degeneration resistor. To overcome this problem a new variable degeneration resistor is proposed where the dc voltage drop is almost removed. Using the proposed gain control scheme, a low-voltage and high-speed CMOS VGA is designed. HSPICE simulation results using a 0.25${\mu}{\textrm}{m}$ CMOS process parameters show that the designed VGA provides a 3dB bandwidth of 360MHz and a 80dB gain control range in 2dB step. Gain errors are less than 0.4dB at 200MHz and less than l.4dB at 300MHz. The designed circuit consumes 10.8mA from a 2.5V supply and its die area is 1190${\mu}{\textrm}{m}$${\times}$360${\mu}{\textrm}{m}$.

Low-power Lattice Wave Digital Filter Design Using CPL (CPL을 이용한 저전력 격자 웨이브 디지털 필터의 설계)

  • 김대연;이영중;정진균;정항근
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.10
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    • pp.39-50
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    • 1998
  • Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.

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