• Journal of Advanced Navigation Technology
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• v.24 no.2
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• pp.85-91
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• 2020

Recently, a multi-mode radar system was designed for efficient operation of unmanned aerial vehicles (UAVs) in various environments, which has the advantage of being able to integrate and utilize methods of the pulse Doppler (PD) radar and the frequency modulated continuous wave (FMCW) radar. For the range detection part of the multi-mode radar signal processor (RSP), the hardware structure using the FFT processor and the IFFT processor is required to be designed in a way that improves efficiency on the area side. In addition, given the radar application environment that requires a variety of distance resolutions, FFT processors need to support variable-length operations. In this paper, the FFT processor and IFFT processor in multi-mode RSP range estimation are designed and proposed as hardware for a single FFT processor that supports variable length operation of 16-1024 points. The proposed FFT processor designed in hardware description language (HDL) and can be implemented with 7,452 logic elements and 5,116 registers.

• Proceedings of the Korea Society for Simulation Conference
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• 2002.05a
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• pp.125-129
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• 2002

실시간 운영체제(Real-Time Operating System: 이하 RTOS라 함) 개발환경에서 제공하는 도구 중에 하나인 RTOS 시뮬레이터는 타겟 하드웨어가 호스트에 연결되어 있지 않아도 호스트에서 응용프로그램의 개발과 디버깅을 가능하게 해주는 타겟 시뮬레이션 환경을 제공해 줌으로서, 개발자로 하여금 빠른 시간 내에 응용프로그램을 개발할 수 있도록 지원하며 하드웨어 개발이 완료되기 전에도 응용프로그램을 개발할 수 있게 해 준다. 그러한 이유로 현재 대부분의 상용 RTOS 개발환경에서는 RTOS 시뮬레이터를 제공하고 있다. 그러나 현재 상용 RTOS 시뮬레이터들은 대부분 RTOS의 기능적인 부분들만 호스트에서 동작하도록 구현되어 있어서 RTOS나 RTOS 응용프로그램이 실제 타겟에서 실행될 때의 실질적인 시간 추정이 불가능하다. 이러한 문제점은 실시간 시스템이 정해진 시간 내에 결과를 출력해야 하는 시스템임을 감안한다면 RTOS 시뮬레이터의 가장 큰 결점이 되기 때문에 실행시간 추정 기능을 가지면서 실용화도 가능한 RTOS 시뮬레이터가 필요하다. 본 연구에서는 이러한 문제점을 해결하여 RTOS와 RTOS 응용프로그램이 실제 타겟에서 처리될 때의 실행시간 추정이 가능하고 상용화가 가능한 기계 명령어 기반(machine instruction-based)의 RTOS 시뮬레이터를 연구 개발하였다. 나아가 실행시간의 주요 요소인 파이프라인과 캐쉬의 영향도 고려함으로서 실행시간 추정의 정확도를 향상시켰다 본 연구에서 사용된 RTOS는 한국전자통신연구원(ETRI)에서 2000년에 개발된 Q+이고, Q+가 동작하는 타겟 하드웨어는 ARM 계열의 StrongARM SA-110 마이크로프로세서와 21285 주제어기가 장착된 EBSA-285 보드이다. 측정하면서 수행하였다. 검증 결과 random 상태에서는 문헌자료에 부합되는 예측결과를 보여주었으나, intermediate와 constant 상태에서는 문헌보다 다소 낮은 속도를 보여주었다 이러한 속도차는 추후 현장 데이터를 수집하여 보다 실질적인 검증을 통하여 조정되어야 할 것으로 판단된다.지발광(1.26초)보다 구애발광(1.12초)에서 0.88배 감소하였고, 암컷에서 정지발광(2.99초)보다 구애발광(1.06초)에서 0.35배 감소하였다. 발광양상에서 발광주파수는 수짓의 정지발광에서 0.8 Hz, 수컷 구애발광에서 0.9 Hz, 암컷의 정지발광에서 0.3 Hz, 암컷의 구애발광에서 0.9 Hz로 각각 나타났다. H. papariensis의 발광파장영역은 400 nm에서 700 nm에 이르는 모든 영역에서 확인되었으며 가장 높은 첨두치는 600 nm에 있고 500에서 600 nm 사이의 파장대가 가장 두드러지게 나타났다. 발광양상과 어우러진 교미행동은 Hp system과 같은 결과를 얻었다.하는 방법을 제안한다. 즉 채널 액세스 확률을 각 슬롯에서 예약상태에 있는 음성 단말의 수뿐만 아니라 각 슬롯에서 예약을 하려고 하는 단말의 수에 기초하여 산출하는 방법을 제안하고 이의 성능을 분석하였다. 시뮬레이션에 의해 새로 제안된 채널 허용 확률을 산출하는 방식의 성능을 비교한 결과 기존에 제안된 방법들보다 상당한 성능의 향상을 볼 수 있었다., 인삼이 성장될 때 부분적인 영양상태의 불충분이나 기후 등에 따른 영향을 받을 수 있기 때문에 앞으로 이에 대한 많은 연구가 이루어져야할 것으로 판단된다.태에도 불구하고 [-wh]의미의 겹의문사는 병렬적 관계의 합성어가 아니라 내부구조를 지니지 않은 단순한 단어(minimal $X^{0}$

• Journal of the Korean Association of Geographic Information Studies
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• v.6 no.1
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• pp.132-142
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• 2003

A significant deficiency of most computer models used for stream floodplain analysis, is that the locations of structures impacted by flood waters, such as roads, buildings, and bridges, cannot be effectively compared to the floodplain location. The purpose of this study is the integration of the HEC River Analysis System(HEC-RAS) with ArcView geographic information system to develop a regional model for floodplain determination and representation. Also this study presents to enable two- and three-dimensional floodplain mapping and analysis in the ArcView. The methodology is applied to a Yeoju of Kyunggi-do, located in South Han River Basin. A digital terrain model is synthesized from HEC-RAS cross-sectional data and a digital elevation model of the study area. The flood plain data developed in ArcView was imported into HEC-RAS where it was combined with the field surveyed channel data in order to construct full floodplain cross sections that reflected accurate channel and overbank data for the HEC-RAS model. The flood plain limits could be expressed more accurately on ArcView by using water level data to be computed in HEC-RAS program. The computed water surface elevations and information of cross-section must be manually plotted in order to delineate floodplains. The resulting of this study provided a good representation of the general landscape and contained additional detail within the stream channel. Overall, the results of the study indicate that GIS combined with HEC-RAS is proven to be very useful and efficient for the automatic generation of flood maps, and an effective environment for floodplain mapping and analysis.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3235-3245
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• 1996

A DDFS(Direct Digital Frequency Synthesizer) used in spread spectrum communication systems must need fast switching speed, high resolution(the step size of the synthesizer), small size and low power. The chip has been designed with four parallel sine look-up table to achieve four times throughput of a single DDFS. To achieve a high processing speed DDFS chip, a 24-bit pipelined CMOS technique has been applied to the phase accumulator design. To reduce the size of the ROM, each sine ROM of the DDFS is stored 0-.pi./2 sine wave data by taking advantage of the fact that only one quadrant of the sine needs to be stored, since the sine the sine has symmetric property. And the 8 bit of phase accumulator's output are used as ROM addresses, and the 2 MSBs control the quadrants to synthesis the sine wave. To compensate the spectrum purity ty phase truncation, the DDFS use a noise shaper that structure like a phase accumlator. The system input clock is divided clock, 1/2*clock, and 1/4*clock. and the system use a low frequency(1/4*clock) except MUX block, so reduce the power consumption. A 107MHz DDFS(Direct Digital Frequency Synthesizer) implemented using 0.8.mu.m CMOS gate array technologies is presented. The synthesizer covers a bandwidth from DC to 26.5MHz in steps of 1.48Hz with a switching speed of 0.5.mu.s and a turing latency of 55 clock cycles. The DDFS synthesizes 10 bit sine waveforms with a spectral purity of -65dBc. Power consumption is 276.5mW at 40MHz and 5V.

• Journal of Broadcast Engineering
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• v.14 no.6
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• pp.692-702
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• 2009

Real-time virtual studios which could run only on expensive workstations are now available for personal computers thanks to the recent development of graphics hardware. Nevertheless, graphics are rendered off-line in the post production stage in film or TV drama productions, because the graphics' quality is still restricted by the real-time hardware. Software-based camera tracking methods taking only the source video into account take much computation time, and often shows unstable results. To overcome this restriction, we propose a system that stores camera motion data from sensors at shooting time as common virtual studios and uses them in the post production stage, named as POVIS(post virtual imaging system). For seamless registration of graphics onto the camera video, precise zoom lens calibration must precede the post production. A practical method using only two planar patterns is used in this work. We present a method to reduce the camera sensor's error due to the mechanical mismatch, using the Kalman filter. POVIS was successfully used to track the camera in a documentary production and saved much of the processing time, while conventional methods failed due to lack of features to track.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.8
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• pp.1-11
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• 1998

One of the desired features for the realizations of high quality Information and Telecommunication services in future is "the Sensation of Reality". This will be achieved only with the visual communication based on the 3- dimensional (3-D) moving images. The main difficulties in realizing 3-D moving image communication are that there is no developed data transmission technology for the hugh amount of data involved in 3-D images and no established technologies for 3-D image recording and displaying in real time. The currently known stereoscopic imaging technologies can only present depth, no moving parallax, so they are not effective in creating the sensation of the reality without taking eye glasses. The more effective 3-D imaging technologies for achieving the sensation of reality are those based on the multiview 3-D images which provides the object image changes as the eyes move to different directions. In this paper, a multiview 3-D imaging system composed of 8 CCD cameras in a case, a RGB(Red, Green, Blue) beam projector, and a holographic screen is introduced. In this system, the 8 view images are recorded by the 8 CCD cameras and the images are transmitted to the beam projector in sequence by a signal converter. This signal converter converts each camera signal into 3 different color signals, i.e., RGB signals, combines each color signal from the 8 cameras into a serial signal train by multiplexing and drives the corresponding color channel of the beam projector to 480Hz frame rate. The beam projector projects images to the holographic screen through a LCD shutter. The LCD shutter consists of 8 LCD strips. The image of each LCD strip, created by the holographic screen, forms as sub-viewing zone. Since the ON period and sequence of the LCD strips are synchronized with those of the camera image sampling adn the beam projector image projection, the multiview 3-D moving images are viewed at the viewing zone.

• Journal of Advanced Navigation Technology
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• v.15 no.2
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• pp.213-220
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• 2011

In this paper, the channel preprocessor with an area-efficient architecture is proposed for the MIMO symbol detector which can support four transmit and receive antennas. The proposed channel preprocessor can shrink the channel dimension to reduce the hardware complexity of the MIMO symbol detector. Also, the proposed channel preprocessor is implemented with very low complexity by using QR decomposition (QRD) and log-number system (LNS). By applying QRD and LNS to the nulling matrix calculation block, the numbers of matrix-multiplications and matrix-divisions are decreased and thus the complexity of the proposed channel preprocessor is significantly reduced. The proposed channel preprocessor was designed in a hardware description language (HDL) and synthesized to gate-level circuits using 0.13um CMOS standard cell library. With the proposed channel preprocessor, the number of logic gates for channel preprocessor is reduced by 20.2% compared with the conventional architecture.

• Journal of the Korean Institute of Intelligent Systems
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• v.15 no.7
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• pp.846-851
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• 2005

In this paper, we propose Genetic Algorithms(GAs)-based Optimized Polynomial Neural Networks(PNN). The proposed algorithm is based on Group Method of Data Handling(GMDH) method and its structure is similar to feedforward Neural Networks. But the structure of PNN is not fixed like in conventional neural networks and can be generated in a dynamic manner. As each node of PNN structure, we use several types of high-order polynomial such as linear, quadratic and modified quadratic, and it is connected as various kinds of multi-variable inputs. The conventional PNN depends on the experience of a designer that select the number of input variables, input variable and polynomial type. Therefore it is very difficult to organize optimized network. The proposed algorithm leads to identify and select the number of input variables, input variable and polynomial type by using Genetic Algorithms(GAs). The aggregate performance index with weighting factor is proposed as well. The study is illustrated with tile NOx omission process data of gas turbine power plant for application to nonlinear process. In the sequel the proposed model shows not only superb predictability but also high accuracy in comparison to the existing intelligent models.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.41 no.7
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• pp.645-653
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• 2017

In bone tissue engineering, polycaprolactone (PCL) is one of the most widely used biomaterials in the manufacturing of scaffolds as a synthetic polymer having biodegradability and biocompatibility. The strut width in the fabrication of scaffolds is an important part of tissue regeneration in in-vitro and in-vivo experiments, because it affects not only the pore size but also the porosity. In this study, we used polymer deposition system (PDS) and design of experiments (DOE) to explore the optimal process conditions to achieve a systematic and efficient scaffold manufacturing process, using temperature, pressure, scan velocity, and nozzle tip height as the parameters for the experiments. The aim of this research was to fabricate a 3D PCL scaffold having a uniform strut width of $150{\mu}m$ using DOE; it was proved that the strut width was constant in all the experimental groups by fabricating the PCL scaffolds according to various pore patterns as well as one pore pattern.

• Analytical Science and Technology
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• v.23 no.6
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• pp.587-594
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• 2010

This study aims to determine that the test of medicines containing oxiracetam as their main ingredient was properly performed according to protocol. Furthermore, the study is to provide the written form of protocol in order to examine the validity of the HPLC analytical method for the quantitative analysis of oxiracetam in the finished products. In this experiment, system suitability, precision, linearity, range, accuracy, specificity, quantitative limit, and detection limit of the analytical method which was used to determine the contained quality of oxiracetam, were examined. The result shows that system suitability indicates 0.127% RSD, plate number 15081, tailing factor 0.49, and resolution 32.41. The experiment of precision reveals the result of below 0.359% for repetitiveness and among the subjects. In the linearity experiment, a coefficient of correlation ($R^2$) indicates that it is 1. The accuracy experiment satisfies the standards of the recovery test, which is minimum 98.4% and maximum 99.6%. Detection limit is 0.1 mg/L and quantitative limit was found to be 0.5 mg/L. The experiment to check the specificity also satisfies the standards, so the finished product using oxiracetam as the main ingredient is verified as suitable.