• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.896-899
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• 2016

Server management and power management are important to operate a data center stably and efficiently. By this paper, we introduce an web based application that is able to monitor and visualize energy consumption, help to energy consumption analysis of a data center due to provide server monitoring information such as temperatures for server, status of each device, power status using server management interfaces and power management modules in data center, also suggest the methods to implement them. This application takes advantage of IPMI which is server management standard interfaces and server management technology in manufacturer's individual way so it can do integrated monitoring for heterogeneous severs, and there is little monitoring load inside of server system because it doesn't need to install agent program for monitoring target system, and it can be used successfully to energy consumption analysis, server management in a data center due to realtime provided energy consumption and monitoring information.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.1
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• pp.261-269
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• 2014

There are many researches on fast exponentiation algorithm which is used to implement a public key cryptosystem such as RSA. On the other hand, the malicious attacker has tried various side-channel attacks to extract the secret key. In these attacks, an attacker uses the power consumption or electromagnetic radiation of cryptographic devices which is measured during computation of exponentiation algorithm. In this paper, we propose a novel simple power analysis attack on m-ary exponentiation implementation. The core idea of our attack on m-ary exponentiation with pre-computation process is that an attacker controls the input message to identify the power consumption patterns which are related with secret key. Furthermore, we implement the m-ary exponentiation on evaluation board and apply our simple power analysis attack to it. As a result, we verify that the secret key can be revealed in experimental environment.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.10
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• pp.467-473
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• 2007

Power-aware design is one of the most important areas to be emphasized in multimedia mobile systems, in which data transfers dominate the power consumption. In this paper, we propose a new architecture for motion compensation (MC) of H.264/AVC with power reduction by decreasing the data transfers. For this purpose, a reconfigurable microarchitecture based on data type is proposed for interpolation and it is mapped onto the dedicated motion compensation IP (intellectual property) effectively without sacrificing the performance or the system latency. The original quarter-pel interpolation equation that consists of one or two half-pel interpolations and one averaging operation is designed to have different execution control modes, which result in decreasing memory accesses greatly and maintaining the system efficiency. The simulation result shows that the proposed method could reduce up to 87% of power consumption caused by data transfers over the conventional method in MC module.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.8
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• pp.1901-1907
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• 2015

Today's smartphones and user devices are equipped with multiple radio interfaces increasingly. Aggregating theses multiple radio interfaces and using them concurrently will increase a user's communication speed immediately, but at the expense of increased power consumption. In this paper, we develop a mathematical performance model of an adaptive radio activation scheme by which a radio interface is activated only when needed for performance increase and deactivated otherwise. The developed model shows that the adaptive scheme reduces delay significantly and almost halves power consumption below a certain level of traffic input.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.10C
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• pp.798-804
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• 2008

This paper proposes a low-power circuit for detecting and correcting L2 cache errors during microprocessor data image processing. A simplescalar-ARM is used to analyze input and output data by accessing the microprocessor's L2 cache during image processing in terms of the data input and output frequency as well as the variation of each bit for 32-bit processing. The circuit is implemented based on an H-matrix capable of achieving low power consumption by extracting bits with small and large amounts of variation and allocating bits with similarities in variation. Simulation is performed using H-spice to compare power consumption of the proposed circuit to the odd-weight-column code used in a conventional microprocessor. The experimental results indicated that the proposed circuit reduced power consumption by 17% compared to the odd-weight-column code.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.257-258
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• 2015

Korean power consumption of the electrical supply problems due to excess demand is repeated every year, the interest in energy increasing social and personal cost has been subject to the number of ways to reduce this cost increases. Automatic doors and automatic door installation market is increasing every year and frequently, when used in general commercial and communal porch consumption based on average 300 times a day power is 70[W] degree is a monthly average usage is about 50.4[KW]. The level can not ignore the power consumption due to switching frequency is large. In this paper, by converting the energy to be discarded in the automatic doors to the inverter and the regenerative energy and to develop control systems for power regeneration to reduce the power consumption by utilizing automatic contact auxiliary power.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.978-980
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• 2013

In this paper, we have presented a basic idea of a power shut-off client based on NFC (near field communication). For the first step of the system design, we have shown the conceptual diagrams of the hardware configuration and the software logic flow. This system can be applied to the integrated power control in home, office, school, factory, and apartment. The standby power shut-off system will bring saving in electrical energy and cost.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.2
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• pp.135-140
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• 2011

Currently, studies have show that the network related energy consumption are increasing. and part of overall energy consumption of our society are too. So, that is important to look for energy-efficient network applications and protocols. A most of network energy consumption are due to network edge devices. in this paper, in order to cut down the emissions of carbon dioxide from ICT business, which contributes 2% of the global energy consumption, it is necessary to understand energy consumption in peer-to-peer system. In this paper, in this paper we propose a architecture based on the introduction of a p2p proxy. The model is analyzed analytically and numerically to reveal how these factors influence the overall power consumption in both steady state and flash crowd information exchange scenarios. Specifically, our results show that the proxy-based solution can provide up to 50% reduction in the energy consumption and, at the same time, a significant reduction in the average file download time.

• Proceedings of the KAIS Fall Conference
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• 2008.11a
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• pp.170-173
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• 2008

최근 우리사회는 IT, 정보통신산업 발달에 따라 고품질의 전력소비계층이 확산되고 있으며, 또한 전력산업의 구조개편 논란으로 인해 전력품질에 대한 국민적 기대와 우려가 상존하고 있는 실정이다. 특히, 소비자의 권익을 강화하기 위해 제정된 제조물책임법(P.L법)이 국내에서 시행됨에 따라 전력공급자의 전압품질 관리의 필요성은 더욱 증대되고 있는 실정이며, 전 세계적으로도 전력품질에 대한 관심이 높아져 선진국에서는 전력품질을 보상할 수 있는 Custom Power 기기, Premium Power Park 등이 개발되어 시험운전하고 있는 실정이다. 이와 같은 배경 하에서 본 연구에서는 이에 대한 대책의 하나로서 국내의 전압변동 실태를 조사 분석하여, 이것이 가전제품 및 산업체에 미치는 영향을 정량적으로 분석하고자 한다.

• The KIPS Transactions:PartA
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• v.14A no.3 s.107
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• pp.147-150
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• 2007

This paper describes a new low-swing inverter for low power consumption. To reduce a power consumption, an output voltage swing is in the range from 0 to VDD-2VTH. This can be done by the inverter structure that allow a full swing or a swing on its input terminal without leakage current. Using this low-swing voltage technology, we proposed a low-power 16$\times$16 bit parallel multiplier. The proposed circuits are designed with Samsung 0.35$\mu$m standard CMOS process at a 3.3V supply voltage. The validity and effectiveness are verified through the HSPICE simulation.. Compared to the previous works, this circuit can reduce the power consumption rate of 17.3% and the power-delay product of 16.5%.