• 전기의세계
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• v.38 no.4
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• pp.12-19
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• 1989

16Mb DRAM을 개발하는데 필요한 주요한 기술적인 문제점으로 설계면에서는 전력소모, Noise, Vcc내부 전압강하회로를 들 수 있다. 기술적인 면은 CELL을 어떻게 형상화느냐에 따라 문제가 다르게 나타나나 단차에 따른 photo/etching, 박막의 leakage전류와 reliability, short channel에 따른 transistor특성의 안정화등이 있다. 특히 16Mb에서는 stack형, stack과 trench의 병합형이 cell의 주요형태가 될 전망이다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.43-49
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• 2009

We present an efficient estimation method of the battery lifetime considering various power consumption profiles in wireless sensor nodes. The power profiles in single and periodic modes and the current dissipations in different operating modes are taken into account to find the total current consumption. Also, the self-discharge rate of a battery is taken into account to estimate the battery lifetime of a given sensor node. Finally we present a governing equation for finding the battery lifetime. We believe the proposed estimation method of the battery lifetime can be an efficient and effective method for low power design of sensor nodes.

• Aerospace Engineering and Technology
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• v.9 no.2
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• pp.57-62
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• 2010

SAR payload of LEO satellite will consume about 150A current. This high current makes the voltage drop between battery, satellite main bus and payload interface, which cannot guarantee the input voltage level of the satellite electrical unit and payload. So, it is necessary to predict the main bus and payload input voltage level when the payload works. In this paper, the worst case analysis of the harness and contact resistance was executed and predicted the voltage drop when the payload works.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.11
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• pp.45-53
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• 2003

This paper describes a Unified Voltage Generator that merges the pumping capacitors of boosted voltage generator (VPP) and substrate voltage generator (VBB) for DRAM. This unified voltage generator simultaneously supplies VPP and VBB voltages by using one pumping capacitor and one oscillator. The proposed generator is realized by 0.14${\mu}{\textrm}{m}$DRAM process. The generator reduces the power consumption to 30%, the area of total generator to 40% and the area of pumping capacitor to 29.6%, and improves the pumping efficiency to 13.2% at 2.0V supply voltage. In addition, the generator adopts the charge recycling technique for precharging the pumping capacitor during the period of precharge, thatcan reduces the precharge current to 75%.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.64-72
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• 1998

In this paper, the design of a current integrator for low-voltage, low-power, and high frequency applications using complementary high swing cascode current-mirror is presented. The proposed integrator decreases output current errors due to non-zero input resistance and non-infinite output resistance of the simple current integrator. As a design example, the 3rd order Butterworth lowpass filter is designed by a leapfrog method. Also, we apply the predistortion design method to reduce the magnitude distortion which occurs at a cutoff frequency by the undesirable phase shift of a lossless current integrator. The designed current-mode filter is simulated and examined by SPICE using 0.8$\mu\textrm{m}$ CMOS n-well process parameters. The simulation results show 20MHz cutoff frequency and 615㎼ power dissipation with a 2V power supply. And the cutoff frequency of the filters can be easily changed by the DC bias current.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.10
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• pp.22-29
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• 1998

In this paper, an 10 bit current-mode CMOS A/D converter with a current predictor is designed with a CMOS process to be integrated into a portable image signal processing system. A current predictor let the number of comparator reduce to 70 percent compared with the two step flash architecture. The current magnitude of current reference is reduced to 68 percent with a modular current reference. The designed 10 bit Low-power current-mode CMOS A/D converter with a current predictor is simulated with HSPICE using 0.6$\mu\textrm{m}$ N-well single-poly triple-metal CMOS process parameters. It results in a conversion rate of 10MSamples/s. A power consumption is measured to be 94.4mW at single +5V supply voltage. The 10 bit A/D converter fabricated using the same process occupies the chip area of 1.8mm x 2.4mm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.779-781
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• 2010

Trench D-MOS(double-diffusion MOS)는 기존의 D-MOS를 대체한 것으로 전체 전류의 길이를 짧게 함으로써 온전압강하가 낮아지게 된다. 따라서 소자가 턴-온시에 전력소모가 작게 되며, 온저항과 트레이드 오프관계인 턴-오프 특성도 그다지 나빠지지 않아 트레이드 오프 특성도 개선되어지는 장점이 있다. 본 논문은 MicoroTec 시뮬레이션을 이용하여 Trench D-MOS의 산화벽을 다르게하여 전류-전압 특성을 연구하였다.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.358-359
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• 2019

철교나 석유비축기지 탱크저판 및 각종 매설관로 등 대부분 철 성분 골조는 시간이 경과하면 주변의 환경에 따라 부식이 급격히 일어난다. 이러한 철강재가 부식되는 철강재가 시설물의 주요 구성물이 되고 있는 시설물의 수명을 크게 단축시키는 주요원인이 되고 있다. 이에 대한 대비책으로 방청도료나 코팅을 이용하는 방법과 달리, 전기적으로 전위차를 같게 하여 부식을 방지하는 전기방식법을 적용함에 있어 방식전류가 불균일한 경우 양극 소모가 불균일함에 따라 교체시기 문제를 극복하기 위해 회로 등가 임피던스 추정 및 RF 릴레이 장착한 TB를 이용한 방식전류제어장치를 개발하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.2
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• pp.345-352
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• 2017

In this paper, a unified potentiostat which can measure the current of both $O_2$-based and $H_2O_2$-based blood glucose sensors with low supply voltage of 1.0V has been designed and verified by simulations and measurements. Potentiostat is composed of low-voltage operational transconductance amplifier, cascode current mirrors and mode-selection circuits. It can measure currents of blood glucose chemical reactions occurred by $O_2$ or $H_2O_2$. The body of PMOS input differentional stage of the operational transconductance amplifier is forward-biased to reduce the threshold voltage for low supply voltage operation. Also, cascode current mirror is used to reduce current measurement error generated by channel length modulation effects. The proposed low-voltage potentiostat is designed and simulated using Cadence SPECTRE and fabricated in Magnachip 0.18um CMOS technology with chip size of $110{\mu}m{\times}60{\mu}m$. The measurement results show that consumption current is maximum $46{\mu}A$ at supply voltage of 1.0V. Using the persian potassium($K_3Fe(CN)_6$) equivalent to glucose, the operation of the fabricated potentiostat was confirmed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.2
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• pp.110-115
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• 2005

Plasma Transferred Arc Spray process was used to make modified surface for wear and corrosion resistant by using Co system powder type alloy. The modified surface was produced by changing only spray current and other process variables were constant. The current range was from 80 amp to 140 amp as inclosing 20 amp. It was appeared that the geometrical shape, microstructures and microhardness of the modified surface were affected by the different cooling rate of base metal. The modified surface that produced by 120 amp current exhibited the fine microstructure and the highest microhardness number impling good surface characteristics. It was also found that the spray current affected the width but not the height of the bead as increasing current.