• Title/Summary/Keyword: 선형 전력증폭기

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Design of Highly Linear Power Amplifier using Bandpass Filter based on Metamaterial Structure (Metamaterial 구조의 대역통과여파기를 이용한 WCDMA 대역 고선형 전력증폭기 설계)

  • Kim, Hyoung-Jun;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.1
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    • pp.68-72
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    • 2012
  • In this paper, highly linear power amplifier using bandpass filter based on metamaterial and Composite Right- / Left-Handed (CRLH) structure is proposed. The proposed bandpass filter consist of the series capacitor, series microstrip line and the parallel inductor, parallel microstrip line. The insertion loss is minimized at operation frequency and the $2^{nd}$ harmonic is suppressed by the bandpass filter using the CRLH structure. And we improved the Adjacent Channel Leakage Ratio (ACLR) using the characteristic of the proposed bandpass filter. At 2.14 GHz, we have obtained the output power of 38.83 dBm, the $2^{nd}$ harmonic of .61.33 dBc, the $3^{rd}$ IMD of .54.67 dBc, and ACLR of .51.33 dBc at 5 MHz offset, -56.50 dBc at 10 MHz offset, respectively.

A Study for Efficiency Improvement of Feedforward Power Amplifier by Using Doherty Amplifier (Doherty증폭기를 이용한 Feedforward전력 증폭기의 효율 개선에 관한 연구)

  • Lee Taek-Ho;Jung Sung-Chan;Park Cheon-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.11 s.102
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    • pp.1059-1066
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    • 2005
  • This paper reports an application of Doherty amplifier for efficiency improvement of feedforward power amplifier(FPA). For performance analysis, we measured 15 W average output power using WCDMA 4FA input signal with a center frequency 2.14 GHz. The applied Doherty amplifier presents the characteristics of high efficiency and low linearity in comparison to the class AB amplifier, and it was used as main amplifier of FPA fir efficiency improvement. To analyze the change of characteristic, tow Doherty amplifiers whose linearity and efficiency are different were applied. The applied FPAs are improved about $2\%$ or more performance in efficiency, but decreased in linearity on 15 W average output power. We additionally modified the coupling factor(CF) of the error loop and the error amplifier capacity for linearity improvement. Aa a result, the efficiency improvement and high linearity resulted from the change of CF and error amplifier capacity. However, we think if the linearity of Doherty amplifier were more than 35 dBc, the FPA would improve the performance about $2\%$ or more efficiency and maintain enough linearity.

Effect of Nonlinear Power Amplifier and Carrier Frequency Offset on MC-DS-CDMA Systems (MC-DS-CDMA 시스템에서 비선형 전력증폭기와 반송파 주파수 편차의 영향)

  • Choi Seung-Kuk;Cho Kyoung-Ah
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.504-509
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    • 2005
  • This paper evaluates the BER performance of MC-DS-CDMA systems in frequency selective Rayleigh fading channel, considering the carrier frequency offset and the nonlinear high power amplifier. In the uplink MC-DS-CDMA, the BER performance is better than in the downlink. This paper presents the required output back-off of the nonlinear amplifier and value of frequency offset for good BER performance.

Design of High Efficiency Underwater Power Amplifier for Parametric Array Transducer (Parametric Array Transducer를 위한 고효율 수중전력증폭기의 설계)

  • Shim, Jae-Hyeok;Kim, In-Dong;Nho, Eui-Cheol;Moon, Won-Kyu;Kim, Won-Ho
    • Proceedings of the KIPE Conference
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    • 2013.11a
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    • pp.29-30
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    • 2013
  • 본 논문에서는 수중통신용 Parametric Array Transducer를 구동하기 위한 고효율 전력증폭기를 제안한다. 수중전력증폭기는 증폭부와 전원부로 나뉘며 증폭부는 Class B push-pull type의 전력증폭기를 사용하며 전력증폭기 구동을 위한 전원부는 기존의 일정전압이 아닌 가변전압을 얻는 Phase-shifted PWM AC/DC 컨버터를 사용하여 고효율로 동작한다. 증폭부는 Class B push-pull type 증폭기를 사용함으로써 뛰어난 선형성이 보장되며 전원 또한 ET(Envelope Tracking)기술을 적용한 가변전압 AC/DC컨버터를 사용하여 고효율로 동작한다. 본 논문에서는 고 효율 수중전력증폭기와 가변전압 AC/DC컨버터의 전력회로를 제시하고 시뮬레이션과 실험을 통하여 특성을 확인하였으며, 수중음향센서를 위한 전력증폭기로 유용하게 사용 될 것을 예상한다.

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Design & Fabrication of a Feedforward Power Amplifier for 900 MHz Band RFID Readers (900 MHz 대역 RFID 리더기용 Feedforward형 선형 전력 증폭기 설계 및 제작)

  • Jung, Byoung-Hee;Chae, Gyu-Sung;Kim, Chang-Woo
    • Journal of Advanced Navigation Technology
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    • v.8 no.2
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    • pp.184-190
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    • 2004
  • A feedforward linear power amplifier (FLPA) has been developed for UHF-band RFID reader applications. The main and error amplifiers are composed of a 2 stage so that linearity of the FLPA can be improved. The FLPA has been implemented on an FR-4 substrate (Er=4.7 and thickness=0.8 mm) with 3-dB and 10-dB hybrid couplers for input/output power divider and combiner. For 2-tone measurement (input level=-11 dBm at $f_1$=915 MHz and $f_2$=916 MHz), the FLPA exhibits a -18.52 dBm of $IMD_3$, which indicates that $IMD_3$ cancellation with feedforward loop is more than 27 dB. From 890 to 960 MHz, 1-dB gain compression output power and power gain of the FLPA are higher than 30 dBm and 40 dB, respectively.

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Modeling of Memory Effects in Power Amplifiers Using Advanced Three-Box Model with Memory Polynomial (전력 증폭기의 메모리 효과 모델링을 위한 메모리 다항식을 이용한 향상된 Three-Box 모델)

  • Ku Hyun-Chul;Lee Kang-Yoon;Hur Jeong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.5 s.108
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    • pp.408-415
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    • 2006
  • This paper suggests an improved system-level model of RF power amplifiers(PAs) including memory effects, and validates the suggested model by analyzing the power spectral density of the output signal with a predistortion linearizer. The original three-box(Wiener-Hammerstein) model uses input and output filters to capture RF frequency response of PAs. The adjacent spectral regrowth that occurs in three-box model can be perfectly removed by Hammerstein structure predistorter. However, the predistorter based on Hammerstein structure achieves limited performance in real PA applications due to other memory effects except RF frequency response. The spectrum of the output signal can be predicted accurately using the suggested model that changes a memoryless block in a three-box model with a memory polynomial. The proposed model accurately predicts the output spectrum density of PA with Hammerstein structure predistorter with less than 2 dB errors over ${\pm}30$ MHz adjacent channel ranges for IEEE 802.11 g WLAN signal.

Research on PAE and Linearity of Power Amplifier Using Adaptive Bias and PBG Structure (적응형 바이어스와 PBG를 이용한 전력증폭기 전력효율과 선형성 개선에 관한 연구)

  • Cho Sunghee;Seo Chulhun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.2 s.332
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    • pp.87-92
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    • 2005
  • In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD and improve PAE (Power Added Efficiency) of the power amplifier. It is controlling the gate 'dc' bias voltage with the envelope of the input RF signal. and The PBG structure has been employed on the output port of power amplifier . The proposed power amplifier using adaptive bias circuit and PBG has been improved the IMG by 3 dBc, and the average PAE by $35.54\%$, respectively.

Minimal Sampling Rate for Quasi-Memoryless Power Amplifiers (전력증폭기 모델링을 위한 최소 샘플링 주파수 연구)

  • Park, Young-Cheol
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.10
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    • pp.185-190
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    • 2007
  • In this paper, minimum sampling rates and method of nonlinear characterization were suggested for low power, quasi-memoryless PAs. So far, the Nyquist rate of the input signal has been used for nonlinear PA modeling, and it is burdening Analog-to-digital converters for wideband signals. This paper shows that the input Nyquist rate sampling is not a necessary condition for successful modeling of quasi-memoryless PAs. Since this sampling requirement relives the bandwidth requirements for Analog-to-digital converters (ADCs) for feedback paths in digital pre-distortion systems, relatively low-cost ADcs can be used to identify nonlinear PAs for wideband signal transmission, even at severe aliasing conditions. Simulation results show that a generic memoryless nonlinear RF power amplifier with AMAM and AMPM distortion can be successfully identified at any sampling rates. Measurement results show the modeling error variation is less than 0.8dB over any sampling rates.

A New Method on the Nonlinear Distortion Analysis in the OFDM Communication System (OFDM 통신 시스템에서 비선형 왜곡분석의 새로운 분석기법)

  • 이동훈;정기호;유흥균
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.6
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    • pp.538-545
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    • 2002
  • In the orthogonal frequency division multiplexing (OFDM) system, the nonlinear distortion in the high power amplifier(HPA) degrades the system performance because of the high peak-to-average power ratio (PAPR). In this paper, a semi-analytical method is newly proposed for the performance evaluation of the nonlinearly distorted OFDM communication system. In the proposed method, at first, the probability density function (pdf) of the PAPR is generated by computer simulation. Then, mean and variance of the non-linear distortion noise process are computed. Next, the overall BER is found by the analytical method. When the equivalent SSPA model is applied in case of the QPSK/16-QAM and AWGN channel, the BER is calculated for the variation of the IBO(input back-off) and PAPR parameter. It is shown that the results by proposed method are very similar to those of the conventional Monte-Carlo method. The computation time can be considerably reduced than the conventional method that depends on the magnitudes of BER and IBO.

Design of a Bias Circuit for Reducing Memory Effects (Memory Effect를 줄이기 위한 바이어스 회로의 설계)

  • Kang, Sanggee
    • Journal of Satellite, Information and Communications
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    • v.12 no.4
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    • pp.115-119
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    • 2017
  • Intermodulation distortion degrades the S/N(signal-to-noise) of the original signal and also affects the adjacent channels. Intermodulation distortion is mainly caused by the nonlinear characteristics of the power amplifier. If the power amplifier with nonlinear characteristics has a memory effect, the intermodulation distortions occurred in the power amplifier are generated in various and complex forms. The predistorter is used as a way to improve intermodulation distortions. In order to efficiently utilize the performance of the predistorter, the memory effect of the power amplifier must be reduced. In this paper, we describe the design method of bias circuit to reduce the memory effect in power amplifiers. To reduce the memory effect, the bias circuit must have a high impedance for the signal and a low impedance for the envelope(modulating signal) and the second harmonic component of the signal. To verify the performance of the bias circuit designed considering the memory effect, a power amplifier operating at 170 ~ 220MHz was designed and implemented. The designed bias circuit has a large impedance in the operating frequency band and low impedance in the envelope signal and the second harmonic of the signal. As a result of the performance measurement, it was found that the asymmetric intermodulation distortion component is improved by 3.7dB.