• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.41-46
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• 2007

A novel post-linearization technique is proposed for CMOS cascode low noise amplifier (LNA). The technique uses dual common gate FETs one of which delivers the linear currents to a load and the other one sinks the $3^{rd}$ order intermodulation currents of output currents from the common source FET. Selective current branching can be implemented in $0.18{\mu}m$ CMOS process by using a thick oxide FET as an IM3 sinker with a normal FET as a linear current buffer. A differential LNA adopting this technique is designed at 2.14GHz. The measurement results show 11dBm IIP3, 15.5dB power gain and 2.85dB noise figure consuming 12.4mA from 1.8V power supply. Compared with the LNA with turning off the IM3 sinker, the proposed technique improves the IIP3 by 7.5 dB.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.1
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• pp.40-48
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• 2000

1A novel bipolar linear transconductor and its application to operational transconductance amplifier(OTA) for low-voltage low-power signal processing is proposed. The transconductor consists of a npn differential-pair with emitter degeneration resistor and a pnp differential-pair connected to the npn differential-pair in cascade. The bias current of the pnp differential-pair is used with the output current of the npn differential-pair for wide linearity and temperature stability. The OTA consists of the linear transconductor and a translinear current cell followed by three current mirrors. The proposed transconductor has superior linearity and low-voltage low-power characteristics when compared with the conventional transconductor. The experimental results show that the transconductor with transconductance of 50 ${\mu}S$ has a linearity error of less than ${\pm}$0.06% over an input voltage range from -2V to +2V at supply voltage ${\pm}$3V. Power dissipation of the transconductor was 2.44 mW. A prototype OTA with a transconductance of 25 ${\mu}S$ has been built with bipolar transistor array. The linearity of the OTA was same as the proposed transconductor. The OTA circuit also exhibits a transconductance that is linearly dependent on a bias current varying over four decades with a sensitivity of 0.5 S/A.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.2
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• pp.134-139
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• 2004

A clock recovery circuit for a 40 Gb/s optical receiver has been designed and implemented. The clock recovery circuit consists of pre-amplifiers, a nonlinear circuit with diodes, a bandpass filter and a clock amplifier. Before implementing the 40 Gb/s clock recovery circuit, a 10 Gb/s clock recovery circuit has been successfully implemented and tested. With the 40 Gb/s clock recovery circuit, when a 40 Gb/s signal of -10 dBm was applied to the input of the circuit, the 40 GHz clock was recovered with the -20 dBm output power after passing through the nonlinear circuit. The output signal from the nonlinear circuit passes through a narrow-band filter, and then amplified. The implemented clock recovery circuit is planned to be used for the input of a phase locked loop to further stabilize the recovered clock signal and to reduce the clock jitter.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.97-102
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• 2004

In this paper, a new predistorter controlling modified individual order jntermodulation distortion signals is proposed. The proposed predistorter generates and controls predistorted third and high order IM signals independently. Using predistorted signals, jntermodulation distortion signals of power amplifier are suppressed effectively. The predistortion linearizer has been implemented to operate in Korean PCS basestation transmitting band (1840～1870MHz). The test results show that IMD3 and IMD5 (C/I) of power amplifier are improved more than 40dB and 23dB for CW two tone signals, respectively. The predistorter improves the adjacent channel power ratio (ACPR) more than 10dB at 885KHz offset point for CDMA (IS-95) signals.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1137-1140
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• 2011

In this paper, the optimal condition for efficient active frequency multipliers is analyzed. This analysis is based on the effects from transistor nonlinear coefficients, harmonic impedances, and output parasitic components. From the analysis, normalized harmonic power is estimated with the clipping condition of a commercial transistor, and the condition for high conversion efficiency is suggested. From the analysis, a class-F frequency tripler was implemented for the output at 2.475 GHz, showing the maximum efficiency of 22.9 % and the maximum conversion gain of 9.5 dB.

• 한국정보통신설비학회:학술대회논문집
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• 2003.08a
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• pp.7-9
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• 2003

멀티코드 CDMA 시스템은 비선형성 전력증폭기의 왜곡에 의해 영향을 많이 받는다. 이런 현상을 방지하기 위해서 멀티코드에서 전송신호의 레벨을 일정하게 하는 방법으로 프리코딩 방법과 Binary CDMA 방법이 제안되었다. 프리코딩은 정보 비트에 여유비트를 추가하여 코드간 직교성의 손실 없이 전송신호의 진폭을 일정하게 하는 방식으로 Wada 의 방법과 CS-CDMA 방법이 있다. Binary CDMA 시스템은 멀티레벨 신호를 이진 클리핑하여 전송하는 방법으로서, 클리핑에 의해 신호의 직교성이 감소하여 성능이 저하될 수 있다. 상관도 평활화 방법은 수신부의 상관도 값이 고르게 분포하도록 하여 Binary CDMA 의 성능을 향상시키는 방법이다. 본 논문 에서는 프리코딩 방식과 상관도 평활화를 적용한 Binary CDMA 방식을 소개하고 칩당 비트전송율과 BER 성능을 비교한다.

• Journal of Advanced Marine Engineering and Technology
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• v.29 no.6
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• pp.618-627
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• 2005

In this paper, we have compared and analyzed the performance of high amplifier using Doherty technique to improve linearity and efficiency of base station and repeater Power amplifier for WCDMA. This Doherty amplifier implements with 3dB branch line coupler and $90^{\circ}C$ transmission line The phase offset line is designed to maintain the high linearity and efficiency at the low efficiency Period of the power amplifier CW 1-tone experimental results at the WCDMA frequency $2.11{\sim}2.17GHz$ shows that Doherty amplifier which achieves power add efficiency(PAE) of 50% at 6dB back off the point from maximum output power 52.3 dBm, obtains higher efficiency of 13.3% than class AB Finding optimum bias Point after adjusted gate voltage, Doherty amplifier shows that $IMD_3$ improves 4dB.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.118-123
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• 2001

For multi-carrier communication system, power amplifier generate intermodulation products caused by their nonlinear characteristics. Intermodulation products arised around the carrier frequency cannot be filtered out, operate as noise source for tile adjacent channel and thus degrades the quality of communication. In this paper, the 1850MHz-band RF linear power amplifier has been designed and fabricated with feedforward loop. The error signal loop consists of several key components such as phase shifter and attenuator, subtracter. The proposed Linearizer was tested with two-tone signals separated 10MHz apart at the center frequency of 1850MHz. The experimental results show C/I improvement by 14.5${\~}$20dB over 15dB dynamic range(33${\~}$47.8dBm) which gave IMD of 53.25${\~}$59dBc for the designed LPA.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.218-222
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• 2008

RF power amplifier requires linearization in order to reduce adjacent channel interference. And most of the existing linearization algorithms assume that a PA has memory-less nonlinearity. But for the wider bandwidth signal, the memory effect of PA cannot be ignored. This paper investigates digital pre-distortion by use of a memory polynomial model which compensates for amplifier nonlinearity and memory effect. The look-up table based implementation scheme is used to reduce the computational complexity of the pre-distortion block. The linearization performance is demonstrated on wideband CDMA signal and class AB high power amplifier.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.9 no.4
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• pp.32-42
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• 2010

In this paper, we represent considering parameters for design of a Cartesian vector modulator predistorter to maximize linearity improvement of the predistorter and propose an advanced Cartesian vector modulator predistrotrer with nonlinear starting point control circuit. In order to confirm the performance of the proposed predistorter, the predistorter is applied to power amplifier with 15 W output power for 2.5 GHz band mobile WiMax 1-FA signal. From the measured results, ACLR of -45.3 dBc with 4 dB improvement of ALCR compared with the previous predistorter is obtained and linearity improvement range is also extended.