• Title/Summary/Keyword: 선형 전력증폭기

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Modeling of High Power Amplifier for Improving the Performance of Digital Pre-Distorter(DPD) (디지털 전치 왜곡기의 성능 향상을 위한 고전력 증폭기의 모델링 기법)

  • Kim, Hyun-Jun;Yun, In-Woo;Son, Ye-Seul;Kim, Jun-Tae;Kim, Joongil
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2016.11a
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    • pp.66-68
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    • 2016
  • 무선 통신 시스템에서 장거리 신호송출을 위해 사용하고 있는 고전력 증폭기(HPA, High Power Amplifier)는 증폭기의 비선형성 때문에 송출신호에 왜곡을 야기시키며 이 때문에 선형구간만을 사용하게 되어 그 전력 효율이 떨어지게 된다. 이 비선형 특성을 해결하기 위하여 디지털 사전 왜곡기(DPD, Digital Pre-distorter)를 HPA 의 앞단에 채용하여 송출신호를 선형화 시키고 효율도 높이게 된다. 이 DPD는 대부분 HPA를 특정 모델이라고 가정하고 최적화 알고리즘을 통해 설계되는데 HPA의 모델에 대한 가정이 맞지 않을 경우 설계된 DPD의 성능이 떨어질 수 있다. 따라서 HPA의 모델을 정확하게 아는 것은 DPD 설계에 있어서 중요한 이슈가 된다. 본 논문에서는 실제 상용되는 HPA에 대해 이미 알려진 다양한 HPA의 모델 중에서 가장 적합한 모델을 선정하고 또한 그 모델의 계수를 얻어내는 방법을 소개한다. 이렇게 얻어진 HPA의 모델정보는 최적의 DPD 설계에 사용될 수 있다. 각 HPA 모델에 대한 파라메터를 구함에 있어서 알려진 최적화 방법 이외에 직접 적용이 어려운 경우에는 기존 방식을 수정하고 그 방식을 사용하였다. 실제 HPA 의 입출력 신호를 실시간 수집하고 컴퓨터 모의실험을 수행하여 동일한 HPA 입력 신호에 대해 실제 HPA의 출력과 찾아낸 최적 모델의 출력을 비교 분석함으로써 실제 찾아낸 모델이 가장 정확하게 상용 HPA를 모델링 하고 있음을 확인하였다.

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Long-distance transfer control of PMLSM using section control (섹션을 이용한 영구자석선형동기전동기의 장거리 이송제어)

  • Park, B.W.;An, M.H.;Kim, J.W.;Moon, S.H.;Park, S.J.;Lee, K.C.
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.106-107
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    • 2014
  • 본 논문에서는 장거리/정밀 이송장치의 추진시스템 동작을 위한 새로운 구조의 영구자석선형동기전동기 및 제어 알고리즘을 제안한다. 제안하는 선형전동기의 이동자는 영구자석을 사용하였으며, 고정자는 각각 독립된 구조를 갖는 집중권선 방식의 코일로 구성되어 있다. 다수의 독립적인 코일 구동을 위하여 아날로그 전류증폭기를 사용하여 전류제어기를 제작하였다. 또한 성능파악을 위해 영구자석선형동기전동기의 축소형 프로토 타입을 제작하였고 실험결과를 통해 제안된 영구자석선형동기전동기의 장거리/정밀 이송장치로서의 적합성을 증명하였다.

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Complexity reduced partial transmit sequence for PAPR reduction and performance analysis with nonlinear high power amplifier in MC-CDMA (MC-CDMA에서 PAPR 감소를 위한 복잡도가 감소된 부분전송열 기법과 비선형 고출력 증폭기에 의한 성능 분석)

  • 강군석;김수영;오덕길;김재명
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.5A
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    • pp.305-315
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    • 2003
  • MC-CDMA(Multicarrier code division multiple access), which is based on a combination of OFDM(orthogonal frequency division multiplexing) and CDMA(code division multiple access), has gained a lot of interests in wireless multimedia communications, as high speed data transmission is required for mobile services. MC-CDMA has many advantages for broadband high speed data transmission in multipath environment because it can offer both advantages of the CDMA and the OFDM. However, A high PAPR(peak to average power ratio) problem, which is a major drawback of OFDM, is also shown in the MC-CDMA. In this paper, we propose a new phase factor optimization scheme to reduce complexity in PTS(partial transmit sequence) to reduce PAPR. We also analyze the performance of the MC-CDMA with various PTS schemes to investigate the relations between PAPR characteristics and effect of nonlinear distortion of a high power amplifier. Our simulation results reveal that the proposed PTS scheme reduces PAPR about 0.2∼0.5 dB even with 25% reduced- complexity compared to the conventional scheme.

Advanced Hybrid EER Transmitter for WCDMA Application Using Efficiency Optimized Power Amplifier and Modified Bias Modulator (효율이 특화된 전력 증폭기와 개선된 바이어스 모듈레이터로 구성되는 진보된 WCDMA용 하이브리드 포락선 제거 및 복원 전력 송신기)

  • Kim, Il-Du;Woo, Young-Yun;Hong, Sung-Chul;Kim, Jang-Heon;Moon, Jung-Hwan;Jun, Myoung-Su;Kim, Jung-Joon;Kim, Bum-Man
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.8
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    • pp.880-886
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    • 2007
  • We have proposed a new "hybrid" envelope elimination and restoration(EER) transmitter architecture using an efficiency optimized power amplifier(PA) and modified bias modulator. The efficiency of the PA at the average drain voltage is very important for the overall transmitter efficiency because the PA operates mostly at the average power region of the modulation signal. Accordingly, the efficiency of the PA has been optimized at the region. Besides, the bias modulator has been accompanied with the emitter follower for the minimization of memory effect. A saturation amplifier, class $F^{-1}$ is built using a 5-W PEP LDMOSFET for forward-link single-carrier wideband code-division multiple-access(WCDMA) at 1-GHz. For the interlock experiment, the bias modulator has been built with the efficiency of 64.16% and peak output voltage of 31.8 V. The transmitter with the proposed PA and bias modulator has been achieved an efficiency of 44.19%, an improvement of 8.11%. Besides, the output power is enhanced to 32.33 dBm due to the class F operation and the PAE is 38.28% with ACLRs of -35.9 dBc at 5-MHz offset. These results show that the proposed architecture is a very good candidate for the linear and efficient high power transmitter.

Modeling and Digital Predistortion Design of RF Power Amplifier Using Extended Memory Polynomial (확장된 메모리 다항식 모델을 이용한 전력 증폭기 모델링 및 디지털 사전 왜곡기 설계)

  • Lee, Young-Sup;Ku, Hyun-Chul;Kim, Jeong-Hwi;Ryoo, Kyoo-Tae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.11
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    • pp.1254-1264
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    • 2008
  • This paper suggests an extended memory polynomial model that improves accuracy in modeling memory effects of RF power amplifiers(PAs), and verifies effectiveness of the suggested method. The extended memory polynomial model includes cross-terms that are products of input terms that have different delay values to improve the limited accuracy of basic memory polynomial model that includes the diagonal terms of Volterra kernels. The complexity of the memoryless model, memory polynomial model, and the suggested model are compared. The extended memory polynomial model is represented with a matrix equation, and the Volterra kernels are extracted using least square method. In addition, the structure of digital predistorter and digital signal processing(DSP) algorithm based on the suggested model and indirect learning method are proposed to implement a digital predistortion linearization. To verify the suggested model, the predicted output of the model is compared with the measured output for a 10W GaN HEMT RF PA and 30 W LDMOS RF PA using 2.3 GHz WiBro input signal, and adjacent-channel power ratio(ACPR) performance with the proposed digital predistortion is measured. The proposed model increases model accuracy for the PAs, and improves the linearization performance by reducing ACPR.

Power and Spectrum Efficiencies Considering the HPA Nonlinearity in OFDM Communication System (OFDM 통신 시스템에서 비선형 증폭기 특성을 고려한 전력 효율과 대역 효율)

  • 이재은;윤기후;이준서;유흥균
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.6
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    • pp.543-549
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    • 2003
  • It is important to consider the nonlinear effects of the HPA(High Power Amplifier) in the OFDM communication systems and other digital communication systems as well. In this paper, we investigate a new performance figure-of$.$merit(D) that reflects both power and spectrum efficiencies. The performance figure-of-merit is expressed to include the spectrum and power efficiencies that depend on the magnitude of IBO(Input Backoff) and the number of subcarriers. So, we analyze the variation characteristics of the power efficiency and spectrum efficiency which has the tradeoff relationship.

Narrow-Band Analog Pre-Distortion Linearization Technique using UHF 400 MHz Band 20 W Power Amplifier (UHF 400 MHz 대역 20 W급 전력증폭기를 이용한 협대역 아날로그 전치왜곡 선형화 기법)

  • Ha, Jung-wan;Kim, Kang-san;Kim, Hyo-Jong
    • Journal of Advanced Navigation Technology
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    • v.23 no.2
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    • pp.179-185
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    • 2019
  • In this paper, we have studied narrow-band analog pre-distortion linearization technique using UHF 400 MHz band 20 W power amplifier. The analog pre-distorter used the SC1894 radio frequency power amplifier linearizer(RFPAL) provided by MAXIM Corp and through the look-up table technique confirmed the intermodulation distortion(IMD) performance and the adjusted channel leakage ratio(ACLR) improvement for bandwidth below 1 MHz which does not operate on existing chips. In the 400 MHz (400 ~ 500 MHz) band, IMD performance and the ACLR improvement of up to 17.46 dB based on 1-channel offset and up to 16.6 dB based on 2-channel offset were confirmed. In the system requiring the same linearity, we confirmed power efficiency improvement of 12.41% at output power of over 40 W.

A Study on the Improvement of Efficiency and Linearity of Power Amplifier using PBG Structure (PBG 구조를 이용한 전력 증폭기의 효율 및 선형성 개선에 관한 연구)

  • 김병희;박천석
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1182-1190
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    • 2001
  • In this paper, microstrip photonic bandgap (PBG) structure with special perforation patterns etched on the line itself is analyzed and optimized in shape, then used for harmonic tuning of power amplifier. This PBG has an advantage in being fabricated and grounded. The dimension of unit lattice is enlarged vertically, but its input and output line maintain 50 Ω using tapered line. This modification from original structure can lessen possible error in etching PCB. The analysis and design of PBG structure are acquired from using EM simulation. The measured insertion loss of the final structure is 0.3 ∼0.4 dB, and its bandwidth of stopband is 6∼7 GHz. Measured results of improved characteristics by using PBG structure at the output of the power amplifier are 0.72∼0.99 dB in output power, 1.14∼7.8 % in PAE, and 1 dBc in the third IMD.

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Design and performance of a CE-CPSK modulated digital delay locked tracking loop (CE-CPSK 변조된 디지털 지연동기루프의 설계 및 성능 분석)

  • 김성철;송인근
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.4 no.2
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    • pp.417-426
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    • 2000
  • In this paper, CE-CPSK(Constant Envelope Continuous Phase Shift Keying) modulated DS/SS(Direct Sequence Spread Spectrum) transceiver with 908 MHz carrier frequency and 1.5 MHz PN clock rate is proposed. To overcome the effect of nun-linear power amplifier, CE-CPSK modulation method which has the constant envelope and continuous phase characteristics is proposed. To analyze the DS/SS receiver performance with respect to code tracking loop, multipath fading channel is characterized as a two-ray Rayleigh fading channel. To compensate the demerit of analog delay locked loop, digital delay locked loop is employed for code tracking loop. Simulation and experimental examination has been carried out in AWGN(Additive White Gaussian Noise) and Rayleigh fading channel environment in order to prove validity of the proposed method.

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A Research on the Bandwidth Extension of an Analog Feedback Amplifier by Using a Negative Group Delay Circuit (마이너스 군지연 회로를 이용한 아날로그 피드백 증폭기의 대역폭 확장에 관한 연구)

  • Choi, Heung-Gae;Kim, Young-Gyu;Shim, Sung-Un;Jeong, Yong-Chae;Kim, Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.10
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    • pp.1143-1153
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    • 2010
  • In this paper, we propose an alternative method to increase the distortion cancellation bandwidth of an analog RF feedback power amplifier by using a negative group delay circuit(NGDC). A limited distortion cancellation bandwidth due to the group delay(GD) mismatch discouraged the use of feedback technique in spite of its powerful linearization performance. With the fabricated NGDC with positive phase slope over frequency, the feedback amplifier of the proposed topology experimentally achieved adjacent channel leakage ratio(ACLR) improvement of 15 dB over 50 MHz bandwidth at wideband code division multiple access(WCDMA) downlink band when tested with 2-carrier WCDMA signal. At an average output power of 28 dBm, ACLR of 25.1 dB is improved to obtain -53.2 dBc at 5 MHz offset.