• Title/Summary/Keyword: 선형 전력증폭기

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Design and Implementation of Class-AB High Power Amplifier for IMT-2000 System using Optimized Defected Ground Structure (최적화된 DGS 회로를 이용한 IMT-2000용 Class-AB 대전력증폭기의 설계 및 구현)

  • 강병권;차용성;김선형;박준석
    • Journal of the Institute of Convergence Signal Processing
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    • v.4 no.1
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    • pp.41-48
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    • 2003
  • In this paper, a new equivalent circuit for a defected ground structure(DGS) is proposed and adapted to design of a power amplifier for performance improvement. The DGS equivalent circuit presented in this paper consists of parallel LC resonator and parallel capacitance to describe the fringing fields due to the etched defects on the metallic ground plane, and also is used to optimize the matching circuit of a power amplifier. A previous research has also used a DGS for harmonic rejection and efficiency improvement of a power amplifier(1), however, there was no exact equivalent circuit analysis. In this paper, we suggest a novel design method and show the performance improvement of a class AB power amplifier by using the equivalent circuit of a DGS applied to output matching circuit. The design method presented in this paper can provide very accurate design results to satisfy the optimum load condition and the desirable harmonic rejection, simultaneously. As a design example, we have designed a 20W power amplifier with and without circuit simulation of DGS, and compared the measurement results.

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A Design of New Digital Adaptive Predistortion Linearizer Algorithm Based on DFP(Davidon-Fletcher-Powell) Method (DFP Method 기반의 새로운 적응형 디지털 전치 왜곡 선형화기 알고리즘 개발)

  • Jang, Jeong-Seok;Choi, Yong-Gyu;Suh, Kyoung-Whoan;Hong, Ui-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.3
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    • pp.312-319
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    • 2011
  • In this paper, a new linearization algorithm for DPD(Digital PreDistorter) is suggested. This new algorithm uses DFP(Davidon-Fletcher-Powell) method. This algorithm is more accurate than that of the existing algorithms, and this method renew the best-fit value in every routine with out setting the initial value of step-size. In modeling power amplifier, the memory polynomial model which can model the memory effect of the power amplifier is used. And the overall structure of linearizer is based on an indirect learning architecture. In order to verify for performance of proposed algorithm, we compared with LMS(Least Mean-Squares), RLS(Recursive Least squares) algorithm.

A Study on Polynomial Pre-ditsortion Technique Using PAPR Reduction Methode (OFDM 시스템에서 PAPR 감소기법을 적용한 다항식 사전왜곡 기법에 관한 연구)

  • Park, Bee-ho;Kim, Wan-tae;Cho, Sung-joon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.160-163
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    • 2009
  • HPA is one of the most essential device in wireless communication systems. However, because of nonlinear characteristic of HPA transmit signal is distorted with both amplitude and phase, this distortion leads to deepening adjacent channel interference. So a technique to change the nonlinear characteristic with linear characteristic is needed. In this paper, Among all techniques, we adopts a polynomial pre-distortion technique. Pre-distorted signal by pre-distorter has opposite characteristic with HPA. In result, the signal passed through pre-distorter and HPA has linear characteristic. But the accuracy of opposite characteristic of HPA is decreased at near portion of saturation point. So we improve the accuracy of opposite characteristic of HPA by using PAPR reduction method. In this paper, an adaptive polynomial pre-distortion technique is introduced to counterbalance the nonlinear characteristic of the transmit power amplifier, and a PAPR reduction method is introduced to increase efficiency of polynomial pre-distorter.

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Design of Two-Stage Fully-Integrated CMOS Power Amplifier for V-Band Applications (V-대역을 위한 완전 집적된 CMOS 이단 전력증폭기 집적회로 설계)

  • Kim, Hyunjun;Cho, Sooho;Oh, Sungjae;Lim, Wonseob;Kim, Jihoon;Yang, Youngoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.12
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    • pp.1069-1074
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    • 2016
  • This paper presents a V-band two-stage power amplifier integrated circuit using TSMC 65 nm CMOS process. The simple input, output, and inter-stage matching networks based on passive components are integrated. By compensating for power gain characteristics using a pre-distortion technique, the linearity of the power amplifier was improved. The implemented two-stage power amplifier showed a power gain of 10.4 dB, a saturated output power of 9.7 dBm, and an efficiency of 20.8 % with a supply voltage of 1 V at the frequency band of 58.8 GHz.

A Design of Analog Predistortion Linearizer Using Even Harmonic Signals (짝수 고조파 성분을 이용한 아날로그 전치 왜곡 선형화기 설계)

  • Hwang Moon-Soo;Jeon Ki-Kyung;Kim Ell-Kou;Cho Suk-Hui;Kim Young;Kim Byung-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.1 s.104
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    • pp.67-73
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    • 2006
  • This paper proposes a new predistortion linearizer with controlling intermodulation distortion(IMD) signals. This linearizer achieves independent control of third- and fifth-order intermodulation distortion products using amplitude modulation with even harmonic signals. A vector modulator that modulate fundamental signal with both second- and fourth-order harmonic components generated by harmonic generator circuits, generates the inverse characteristics third-and fifth-order intermodulation signals of power amplifier and controls amplitude and phase of them with each other modulation factors. As a results, this linearizer is suppressed IMD signals of power amplifier effectively. The test results show that the third IMD is cancelled more than 25 dB and the fifth order IMD is cancelled about 18 dB for CW two-tone signals. Also, it's improved the adjacent channel power ratio(ACPR) more than 7 dB for IS-95 CDMA signals.

Novel RF front-end circuit for CDMA based PCS phone (CDMA방식의 PCS 전화기를 위한 새로운 방식의 고주파 전위회로에 관한 연구)

  • 윤기호;박한규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.6
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    • pp.1602-1609
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    • 1998
  • In this paper, the design and implementation of the novel RF front end circuit for CDMA based PCS phone is described. This novel scheme is realized by building the power amplifier module combined with duplexer. The dielectric filters which are parts of duplexer are broken up and relocated into the module. Electromagnetic analysis for via holes and coupling between narrow transmissio lines is icluded to design a circuit. The combined moule has been minimaturized to be as small as 1.5CC. It has satisfied IS-95 requirements for linearity performances of CDMA signal at 24-dBm output power as well as played apart as a duplexer. The operating current of about 95mA has been saved owing to both rearranging dielectric filters and limiting operating point to class-B by considering real working power range of CDMA phones.

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A Novel Predistorter design using a Balanced Type IM3 Generator (평형 구조 혼변조 발생기를 이용한 전치왜곡 선형화기 설계)

  • 정형태;김상원;김철동;장익수
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.2
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    • pp.65-70
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    • 2004
  • This paper presents a novel linearization scheme for a nonlinear RF amplifier It is based on the amplitude modulation with envelope signal. The 3rd order distortion generator is composed of two FETs and it adopts a balanced structure for the purpose of main carrier cancellation. The amplitude and phase of the IM3 component can be controlled at RF band. This predistorter is implemented and tested at the KOREA PCS Tx. band (1840∼1870MHz). Experimental results of two-tone test show that the IM3 cancellation is achieved about 30-40 ㏈ for the wide dynamic range. The adjacent channel power ratio is improved by over 10 ㏈ at the broad-band CDMA signal with a peak to average power ratio of l0㏈, and this improvement is maintained through a wide range of output power levels.

Design and Implementation of a Linearizer Using the Feedforward Loop without Delay Lines (지연 선로가 없는 Feedforward Loop를 이용한 선형화기의 설계 및 제작)

  • 정승환;조경준;김완종;안창엽;김종헌
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.1
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    • pp.116-123
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    • 2000
  • This paper presents a linearizer using the feedforward loop which can be applied to PCS base-station applications. This linearizer used a IM amplifier and an auxiliary amplifier in order to remove delay lines used in the predistortor using the feedforward technique. The delay line in error loop is changed by the main power amplifier(PA) and the error amplifier is utilized to amplify the error signal which fed to the output of main amplifier. The linearizer was simulated by HP ADS ver 1.1 and fabricated on GML 1000 with thickness of 0.8 mm and dielectric constant of 3.2. Two-tone signals at 1.85 GHz and 1.851 GHz with -7dBm/tone from synthesizers are injected into the main PA. The main PA with a 27 dB gain and a $P_{1dB}$ of 29 dBm(two-tone) was utilized. The reduction of intermodulation distortion (IMD) is around 17 dB.

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A Design of Power Amplifier with Broadband and High Linearity for 4G Application in 0.11 μm CMOS Process (0.11 μm CMOS 공정을 이용한 4세대 이동통신용 광대역 고 선형 전력증폭기의 설계 및 구현)

  • Kim, Ki-Hyun;Ko, Jae-Yong;Nam, Sang-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.1
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    • pp.50-59
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    • 2016
  • This work shows that the design and test results of a power amplifier(PA) with broadband and high linearity for 4G applications in $0.11{\mu}m$ CMOS process. A 1:2-transformer is designed for load impedance matching of PA and a inter-stage matching is implemented for a linearity. A designed PA achieves more than 27.3 dBm of linear output power and 26.1 % of power-added efficiency(PAE) under an adjacent channel leakage ratio(ACLR) of -30 dBc for a LTE 16-QAM 10 MHz signal with a carrier frequency range of 1.8 to 2.3 GHz.