• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.5
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• pp.16-22
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• 2002

This paper suggests the optimum processing conditions for obtaining good quality $P^{+}$-n shallow junctions formed by pre-amorphization and furnace annealing(FA) to reflow BPSG(bore phosphosilicate glass). $BF_2$ions, the p-type dopant, were implanted with the energy of 20keV and the dose of 2$\times$10$^{15}$ cm$^{-2}$ into the substrates pre-amorphized by As or Ge ions with 45keV, 3$\times$$10^{14}$ $cm^{-2}$. High temperature annealings were performed with a furnace and a rapid thermal annealer. The temperature range of RTA was 950~$1050^{\circ}C$, and the furnace annealing was employed for BPSG reflow with the temperature of $850^{\circ}C$ for 40 minutes. To characterize the formed junctions, junction depth, sheet resistance and diode leakage current were measured. Considering the preamorphization species, Ge ion exhibited better results than As ion. Samples preamorphized with Ge ion and annealed with $1000^{\circ}C$ RTA showed the most excellent characteristics. When FA was included, Ge preamorphization with $1050^{\circ}C$ RTA plus FA showed the lowest product of sheet resistance and junction depth and exhibited the lowest leakage currents.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.37-42
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• 2004

Shallow $p^{＋}$-n junctions were formed by preamorphization, low-energy ion implantation and dual-step annealing processes. Germanium ions were implanted into silicon substrates for preamorphization. The dopant implantation was performed into the preamorphized and non-preamorphized substrates using B $F_2$2 ions. Rapid thermal anneal (RTA) and furnace anneal (FA) were employed for dopant activation and damage removal. Samples were annealed by one of the following four methods; RTA(75$0^{\circ}C$/10s)＋Ft FA＋RTA(75$0^{\circ}C$/10s), RTA(100$0^{\circ}C$/10s)＋FA, FA＋The Ge Preamorphized sample exhibited a shallower junction depth than the non-preamorphized sample. When the employed RTA temperature was 100$0^{\circ}C$, FA＋RTA annealing sequence exhibited better junction characteristics than RTA＋FA thermal cycle from the viewpoint of junction depth, sheet resistance, $R_{s}$$.$ $x_{j}$, and leakage current.t.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1991.04a
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• pp.187-191
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• 1991

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.1
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• pp.31-36
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• 2002

Low energy boron ions were implanted into the preamorphized and crystalline silicon substrates to form 0.2${\mu}m$ $p^+-n$ junctions. The rapid thermal annealing(RTA) was used to annihilate the crystal defects due to implantation and to activate the implanted boron ions, and the furnace annealing was employed to reflow the BPSG(bolo-phosphosilicate glass). The implantation conditions for Gepreamorphization were the energy of 45keV and the dose of 3$\times$1014cm-2. BF2 ions employed as a p-type dopant were implanted with the energy of 20keV and the dose of 2$\times$1015cm-2. The thermal conditions of RTA and furnace annealing were $1000^{\circ}C$/10sec and $850^{\circ}C$/40min, respectively. The junction depths were measured by SIMS and ASR techniques, and the 4-point probe was used to measure the sheet resistances. The electrical characteristics were analyzed via the leakage currents of the fabricated diodes. The single thermal processing with RTA produced shallow junctions of good qualities, and the thermal treatment sequence of furnace anneal and RTA yielded better junction characteristics than that of RTA and furnace anneal.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.9
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• pp.729-735
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• 1991

To form shallow $p^+$ -n junctions, Ge and As ions were employed for preamorphization, and B or BF2 was implanted for doping. Same B and BF$_2$ implantations were performed into single crystalline silicon to compare the material and electrical characteristics with the preamorphized samples. SIMS measurements for 10KeV B implanted samples revealed the somilar boron distribution for two preamophized cases, but the ASR profiles indicated that the shallower junctions could be formed by Ge preamorphzation. Sheet resostance of Ge preamorphized sample was lower than the As preamorphized sample, and the diode leakage current characteristics were similar for the preamorphized and non-preamorphized samples. Among the samples implanted with BF ions into the substrates preamorphized with 25keV Ge or As ions, high sheet resistance and leaky diode characteristics were observed for the As preamorphized samples. It was found that Ge preamorphization is more useful than As preamorphization for the purpose of forming shallow $p^+$ -n junctions using low energy BF$_2$ implantation.

• Electrical & Electronic Materials
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• v.8 no.6
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• pp.737-743
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• 1995

Two step RTD(Rapid Thermal Diffussion) of P into silicon wafer using tungsten halogen lamp was used to fabricated very shallow n$^{+}$p junction. 1st RTD was performed in the temperature range of 800.deg. C for 60 see and the heating rate was in the 50.deg. C/sec. Phosphrous solid source was transfered on the silicon surface. 2nd RTD process was performed in the temperature range 1050.deg. C, 10sec. Using 2 step RTD we can obtain a shallow junction 0.13.mu.m in depth. After RTD, the Ti-silicide process was performed by the two step RTA(Rapid Thermal Annealing) to reduced the electric resistance and to improve the n$^{+}$p junction diode. The titanium thickness was 300.angs.. The condition of lst RTA process was 600.deg. C of 30sec and that of 2nd RTA process was varied in the range 700.deg. C, 750.deg. C, 800.deg. C for 10sec-60sec. After 2 step RTA, sheet resistance was 46.ohm../[]. Ti-silicide n+p junction diode was fabricated and I-V characteristics were measured.red.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.115-117
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• 2005

In this paper, we formed the shallow junction by preamorphization and low energy ion implantation. And a simulator is designed for predicting the annealing process results. Especially, if considered the applicable to single step annealing process(RTA, FA) and dual step annealing process(RTA+FA, FA+RTA). In this simulation, the ion implantation model and the boron diffusion model are used. The Monte Carlo model is used for the ion implantation. Boron diffusion model is based on pair diffusion at nonequilibrium condition. And we considered that the BI-pairs lead the diffusion and the boron activation and clustering reaction. Using the boundary condition and initial condition, the diffusion equation is solved successfully. The simulator is made ofC language and reappear the experimental data successfully.