• Journal of Broadcast Engineering
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• v.16 no.5
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• pp.705-713
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• 2011

This paper deals with the effect of SBR bandwidth on the overall performance of the MPEG USAC. Here, the SBR bandwidth is termed the frequency region covered by the SBR codec, and is specified by the bs_stop_freq, which is one of the SBR bitstream components. The performance of the USACs with 5 different SBR bandwidths are compared in a subjective manner using the MUSHRA test. In the comparison, the bit rate is confined to 14~24kbps and only the LPD unit is selected for the core codec. From the comparison, it is observed that the SBR bandwidth that stretches up to 18KHz or above gives the better performance than the others.

• The Journal of the Acoustical Society of Korea
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• v.35 no.5
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• pp.368-374
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• 2016

This paper presents constructing transmitter and receiver by using a direct sequence spread spectrum techniques to DPSK (Differential Phase-Shift Keying) scheme in underwater acoustic communication. Since DPSK signal can be demodulated if the receiver knows only the phase difference between the adjacent bits, DPSK receiver structure has the advantage of being simplified. In the conventional receiver, two adjacent symbols of transmitted signal before despread are passed to the transition correlator that detects data by comparing maximum correlation outputs. At this time, the error for maximum value of the correlator output may increase because of low SNR (Signal to Noise Ratio) or high Doppler shift frequency according to the underwater channel. In this paper, we propose a method for accurate detection result using the width as well as the magnitude among outputs produced by the correlator. The performances of the proposed method was evaluated by simulation and lake trial data.

• Journal of IKEEE
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• v.19 no.3
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• pp.342-348
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• 2015

High speed implementation of digital filters is required in high data rate applications such as hard-wired wide band modem and high resolution video codec. Since the critical path of the digital filter is the MAC (multiplication and accumulation) circuit, the filter coefficient with sparse non-zero bits enables high speed implementation with adders of low hardware cost. Compressive sensing has been reported to be very successful in sparse representation and sparse signal recovery. In this paper a filter design method for digital FIR filters with CSD (canonic signed digit) coefficients using compressive sensing technique is proposed. The sparse non-zero signed bits are selected in the greedy fashion while pruning the mistakenly selected digits. A few design examples show that the proposed method can be utilized for designing sparse CSD coefficient digital FIR filters approximating the desired frequency response.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.11
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• pp.87-92
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• 2005

This paper analyzes the performance for an improved multistage parallel interference cancellation (PIC) technique with a reverse-link synchronous transmission technique (RLSTT) for DS-CDMA system in a frequency-selective Rayleigh fading channel with an imperfect power control scheme. The performance degradation due to power control error (PCE), which is approximated by a log-normally distributed random variable, is estimated as a function of the standard deviation of the PCE. The uncoded bit error performance is evaluated in order to estimate the system capacity. Comparing with the conventional one-stage PIC system, we show achievable gain around $60\%$ by the RLSTT even in the presence of PCE. We conclude that the capacity can be further improved via RLSTT, which alleviates the detrimental effects of the PCE

• Journal of the Korea Society of Computer and Information
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• v.16 no.10
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• pp.175-183
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• 2011

Performance of digital video watermarking is an assessment that hides a lot of information in digital videos. Therefore, it is required to find a way that enables to store lots of bits of data into a high quality video of the frequency area of digital contents. Hence, this paper designs a watermarking system improving security with an enhancing watermarking based on invisible watermarking and embedding an watermarking on LH and HL subband and its subband by transforming wavelet after the extraction of luminance component from the frames of video by compromising robustness and invisible of watermarking elements. The performance analysis of security of watermarking is carried out with a statistic method, and makes an assessment of robustness against variety of attacks to invisible watermarking. We can verify the security of watermarking against variety of attacks by testing robustness and invisible through carrying out general signal processing like noise addition, lossy compression, and Low-Pass filtering.

• Journal of Internet Computing and Services
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• v.8 no.3
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• pp.33-43
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• 2007

In this proper, we proposes a robust watermarking against the lossy compression in the Hadamard domain. The Hadamard matrix consists of only 1 or -1 and can be computed veru fast. The Hadamrd transform has the inverse transform therefore it is able to be applied into the watermarking technology. In embedding process, we select 10 coefficients from intermediate frequency domain and create two watermark patterns. In extraction process, we use the watermark patterns and compare them to detect the watermark information. When we use the standard image ($512{\times}512$) and binary watermark image ($64{\times}64$), the results of these examines are PSNR for $38{\sim}42dB$ and BER for $3.9{\sim}12.5%$. The JPEG QF between 30 and100, naked human eyes can detect to watermark image easily. The experimental results show that performance of Hadamard domain is better than those of DCT, FFT, and DWT.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.830-833
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• 2007

In this paper, we implemented a $17{\times}17b$ binary digital multiplier using radix-4 Booth;s algorithmand proposed an efficient testing methodology for the full-custom design. A two-stage pipeline architecture was applied to achieve higher throughput and 4:2 adders were used for regular layout structure in the Wallace tree partition. Several chips were fabricated using LG Semicon 0.6-um 3-Metal N-well CMOS technology. We did fault simulations efficiently using the proposed test method resulting in the reduction of the number of faulty nodes by 88%. The chip contains 9115 transistors and the core area occupies $1135^*1545$ mm2. The functional tests using ATS-2 tester showed that it can operate with 24 MHz clock at 5.0 V at room temperature.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10A
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• pp.1042-1049
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• 2007

Frequency reuse in a cellular wireless communication environment gives rise to a phenomenon of cochannel interference. This paper introduces a power control strategy for OFDM based communication systems operating in such an environment. Among the existing power control schemes, IWF(iterative waterfilling) is known to exhibit relatively good performance. However, it requires feedback of power level and bit allocation information for each subcarrier from a receiver to its associated transmitter, which can lead to a considerable overhead, especially for the case of employing large number of subcarriers. Motivated by this, we present a simplified power control scheme with reduced overhead feedback, which allocates some nonzero identical power to the subcarriers of which channel conditions are above a certain threshold and zero power to the other ones. Computer simulations show that the proposed strategy produces a good approximation to the performance of the IWF in terms of the transmission power level while it requires less overhead feedback.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.322-332
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• 2011

In this paper, we introduce the 1st performance evaluation of VLBI Correlation Subsystem (VCS) main product, which is core system of Korea-Japan Joint VLBI Correlator (KJJVC). The main goal of the 1st performance evaluation of VCS main product is that the perfection of overall system will be enhanced after checking the unsolved part by performing the experiments towards various test items at the manufacturer before installation of field. The functional test was performed by including the overflow problem occurred in the FFT re-quantization module due to the insufficient of effective bit at the VCS trial product in this performance test of VCS main product. Through the performance test for VCS main product in the factory, the problem such as FFT re-quantization discovered at performance test of VCS trial product in 2008 was clearly solved and the important functions such as delay tracking, daly compensation, and frequency bining were added in this VCS main product. We also confirmed that the predicted correlation results (fringe) was obtained in the correlation test by using real astronomical observed data(wideband/narrow band).

• Journal of Sensor Science and Technology
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• v.8 no.2
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• pp.163-170
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• 1999

A programmable A/D converter for an embedded fiber-optic combustion pressure sensor has been designed with 8 N and P channel MOSFETs, respectively. A local field enhancement for reducing programming voltage during writing as well as erasing an EEPROM device is introduced. In order to observe linear programmability of the EEPROM device during programming mode, a cell is developed with a $1.2\;{\mu}m$ double poly CMOS fabrication process in MOSIS. It is observed that the high resolution, of say 10mVolt, is valid in the range 1.25volts to 2volts. The experimental result is used for simulating the programmable 8 bit A/D converter with Hspice. The A/D converter is demonstrated to consume low power, $37\;{\mu}W$ by utilizing a programming operation. In addition, the converter is attained at the conversion frequency of 333 MHz.