• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.103-109
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• 2016

Corrective control for asynchronous sequential machines is a novel automatic control theory that compensates illegal behavior or adverse effects of faults in the operation of existent asynchronous machines. In this paper, we propose a scheme of diagnosing and tolerating faults occurring to input channels of corrective control systems. The corrective controller can detect faults occurring in the input channel to the controlled machine, whereas those faults happening in the external input channel cannot be detected. The proposed scheme involves an outer operator which, upon receiving the state feedback, diagnoses a fault and sends an appropriate command signal to the controller for tolerating faults in the external input channel.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.3
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• pp.169-175
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• 2002

This paper is about the hardness of the Election problem in asynchronous distributed systems in which processes can crash but links are reliable. The hardness of the problem is defined with respect to the difficulty to solve it despite failures. It is shown that problems encountered in the system are classified as three classes of problems: F (fault-tolerant), NF (Not fault-tolerant) and NFC(NF-completeness). Among those, the class NFC is the hardest problems to solve. In this paper, we prove that the Election problem is the most difficult problem which belongs to the class NFC.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.5
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• pp.9-17
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• 2010

Corrective control compensates the stable-state behavior of asynchronous sequential machines so that the closed-loop system can be changed in a desirable way. Using corrective control, we present a novel fault tolerance scheme that overcomes permanent faults for asynchronous sequential machines. When a permanent fault occurs to an asynchronous machine, the fault is not recovered forever while the machine is irreversibly stuck in a set of failure states. But, if the machine has control redundancy in the limited behavior range, corrective control can be applied to solve the fault tolerance problem against permanent faults. We present the condition on detecting permanent faults and the existence condition of an appropriate corrective controller. The design procedure for the proposed controller is described in a case study.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.4
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• pp.1-10
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• 2008

The problem of controlling asynchronous sequential machines is addressed in this paper. Corrective control means to make behavior of an asynchronous sequential machine equal to that of a given model. The main objective is to develope a corrective controller, especially when a model is given as nondeterministic, or a set of reference models. The structure of corrective control system for asynchronous sequential machines is addressed first, followed by description of nondeterministic models. Then, we propose a method for analyzing reachability of asynchronous machines and nondeterministic models. Proposed methods are demonstrated in an example.

• Journal of Korea Society of Industrial Information Systems
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• v.17 no.4
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• pp.17-23
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• 2012

Ultra low-power design and energy harvesting applications require digital systems to operate under extremely low voltages approaching the point of balance between dynamic and static power consumption which is attained in the sub-threshold operation mode. Delay variations are extremely large in this mode. Therefore, in this paper, a new low-power logic design methodology using asynchronous NCL circuits is proposed to reduce power consumption and not to be affected by various technology variations in nanoscale MOSFET technology. The proposed NCL is evaluated using various benchmark circuits at 0.4V supply voltage, which are designed using 45nm MOSFET predictive technology model. The simulation results are compared to those of conventional synchrouns logic circuits in terms of power consumption and speed.

• Journal of the Korean Institute of Intelligent Systems
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• v.22 no.1
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• pp.49-55
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• 2012

Asynchronous counters, where the counter value is changed not by a synchronizing clock but by outer inputs, are used in various modern digital systems such as spaceborne electronics. In this paper, we propose a scheme of fault tolerance for asynchronous counters with critical races caused by total ionizing dose (TID) in space. As a typical design flaw of asynchronous digital circuits, critical races cause an asynchronous circuit to show non-deterministic behavior, i.e., the next stable state of a state transition is not a fixed value but may be any value of a state set. Using the corrective control scheme for asynchronous sequential machines, this paper provides an existence condition and design procedure for a state feedback controller that can invalidate the effect of critical races. We implement the proposed control system in VHDL code and conduct experiments to demonstrate that the proposed control system can overcome critical races.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.4
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• pp.394-400
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• 2000

The main goal of synchronization is to guarantee exclusive access to shared data and critical sections, and then it makes parallel programs work correctly and reliably. Exclusive access restricts parallelism of parallel programs, therefor efficient synchronization is essential to achieve high performance in shared-memory parallel programs. Many techniques are devised for efficient synchronization, which utilize features of systems and applications. This paper shows the simulation results that existing synchronization methods have inefficiency under CC-NUMA(Cache Coherent Non-Uniform Memory Access) system, and then compares the performance of Freeze&Melt synchronization that can remove the inefficiency. The simulation results present that Test-and-Test&Set synchronization has inefficiency caused by broadcast operation and the pre-defined order of Queue-On-Lock-Bit (QOLB) synchronization to execute a critical section causes inefficiency. Freeze&Melt synchronization, which removes these inefficiencies, has performance gain by decreasing the waiting time to execute a critical section and the execution time of a critical section, and by reducing the traffic between clusters.

• The Transactions of the Korea Information Processing Society
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• v.5 no.11
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• pp.2980-2988
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• 1998

This paper describes the design of asynchronous adders based on carry selection and carry bypass techniques. The designs are faster than existing asynchronous adders which are based on ripple carry technique. It is caused by reducing the carry transfer time by using carry selection and carry bypass techniques. Also, the design uses tree structure to reduce the completion sensing time. The proposed adders are designed with CMOS domino logic and experimented with HSPICE simulator. Experimental results show that the proposed adders can be faster about 50% in average cases than previous ripple carry adders.

• Journal of Advanced Navigation Technology
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• v.1 no.1
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• pp.70-80
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• 1997

In this paper, the performances of two noncoherent code tracking loops, i. e., traditional code tracking loop(TCTL) and modified code tracking loop(MCTL) are analyzed and compared in a CDMA mobile environment. Closed-form formulas for steady-state jitter variance are derived analytically for the two schemes as a function of the pulse shaping filter, timing offset, signal-to-interference ratio, and loop bandwidth. The design issues of the loop filter are also addressed with emphasis on the second-order tracking loop. Finally, the degradation of BER performance due to timing errors is examined in a CDMA reverse link for IMT-2000 designed by ETRI.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.5
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• pp.518-528
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• 2000

Messages in distributed real-time systems are categorized into two groups: synchronous messages and asynchronous messages. Synchronous messages, such as sampled audio and image data,are generated periodically with delivery time constraints. Protocols should guarantee the end-to-enddeadlines for such messages. Asynchronous messages are non-periodic and may arrive in a randomway with no strict time constraints.In this paper, we propose TTP/C(timed token protocol with concession), an extension of TTPprotocol, to achieve higher timeliness guarantee for synchronous messages in distributed real-timesystems. In TTP/C, a node concedes the allocated bandwidth to other nodes with urgent synchronousmessages to be sent provided that the node has no urgent messages, TTP/C works very well evenif the synchronous messages are generated with some jittering by nodes. The simulation results showthe improved performance of TTP/C protocol for guaranteeing synchronous messages deadlinescomeared to the existing TTP protocols.