• Journal of Broadcast Engineering
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• v.12 no.4
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• pp.303-310
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• 2007

Motion Estimation (ME) is a core part of most Video compression systems since it affects directly the output video quality and the encoding time. The most basic method of ME, Full Search (FS) gives the highest visual quality but also has the problem of significant computational load. To solve this problem, many fast algorithm has been proposed. Among them, MVFAST and PMVFAST show impressive results in video quality and the computational load by using the correlation between motion vectors of adjacent blocks. In particular, PMVFAST reduces search points dramatically and also gives very high video quality by using the median predictor. In this paper, we propose a new algorithm that uses the redefined median predictor which reduces the number of search points and yields a high visual quality by reducing the number of thresholds and early termination conditions.

• Journal of KIISE:Software and Applications
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• v.33 no.4
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• pp.411-417
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• 2006

Motion Estimation (ME) is an important part of video coding process and it takes the largest amount of computation in video compression. Half-pixel and quarter-pixel motion estimation can improve the video compression rate at the cost of higher computational complexity In this paper, we suggest a new efficient low-complexity algorithm for half-pixel and quarter pixel motion estimation. It is based on the experimental results that the sum of absolute differences(SAD) shows parabolic shape and thus can be approximated by using interpolation techniques. The sub-pixel motion vector is searched from the minimum SAD integer-pixel motion vector. The sub-pixel search direction is determined toward the neighboring pixel with the lowest SAD among 8 neighbors. Experimental results show that more than 20% reduction in computation time can be achieved without affecting the quality of video.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.5
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• pp.1189-1198
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• 2015

Recently, with rapid development of digital broadcasting technology, high-definition video service increased interest and demand. supplied mobile and image device support that improve 4~16 time existing Full HD. Such as high-definition contents supply, proposed compression for high-efficiency video codec (HEVC). Therefore, watermarking technology is necessary applying HEVC for protecting ownership and intellectual property. In this paper, analysis of prediction mode in intra frame and study feasibility of watermarking in re-encoding based HEVC. Proposed detect un-changed blocks in intra frame, using the result of analysis prediction mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.503-509
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• 2007

Low-power motion estimation is required for video coding in portable information devices. In this paper, we propose a low-power motion estimation algorithm and 1-D systolic may VLSI architecture using full search block matching algorithm (FSBMA). Main power dissipation sources of FSBMA are complex computations and frequent memory accesses for data in the search area. In the proposed algorithm, memory accesses and computations are reduced by using 1D PE (processing array) array architecture performing motion estimation of two neighboring blocks in parallel and by skipping unnecessary computations during motion estimation. The VLSI implementation results of the algorithm show that the proposed VLSI architecture can save 9.3% power dissipation and can operate two times faster than an existing low-power motion estimator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.3
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• pp.21-29
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• 2012

This paper presents optimized searching technique to improve the performance of H.264/AVC. By using the proposed forward and backward searching algorithm, redundant cycles of latency for data reordering can be removed. Furthermore, in order to reduce the total number of execution cycles of CAVLC encoder, early termination mode and two stage pipelined architecture are proposed. The experimental result shows that the proposed architecture needs only 36.0 cycles on average for each $16{\times}16$ macroblock encoding. The proposed architecture improves the performance by 57.8% than that of previous designs. The proposed CAVLC encoder was implemented using Verilog HDL and synthesized with Magnachip $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count is about 17K with 125Mhz clock frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.1
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• pp.66-75
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• 2000

In this paper, we present the efficient image transmission system using designed source-channel combined coder in W-CDMA mobile communication system. In proposed schemes, we decompose the wavelet transformed hierarchical band-images into some types of different size blocks which have different properties in error sensitivity. The RS(Reed-Solomon) coder with different coding rate is used for each decomposed source blocks which has different importance. In addition, we combine retransmitted error frames in Truncated Hybrid Type I ARQ. The proposed algorithm shows efficient image transmission methods because it is not much degraded in PSNR compared with the existing not combined source-channel coder in erroneous wireless channel.

• Journal of Broadcast Engineering
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• v.19 no.3
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• pp.307-315
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• 2014

A new modified lossless intra-coding method based on a cross residual transform is applied to HEVC(High Efficiency Video Coding). The HEVC standard including a multi-directional spatial prediction method to reduce spatial redundancy encodes the pixels in a PU (Prediction Unit) by using neighboring pixels. In the new modified lossless intra-coding method, the spatial prediction is performed by pixel-based DPCM but is implemented by block-based manner by using cross residual transform on the HEVC standard. The experimental results show that the new lossless intra-coding method reduces the bit rate of approximately 8.4% in comparison with the lossless-intra coding method in the HEVC standard and the proposed method results in slightly better compression ratio than the JPEG2000 lossless coding.

• Journal of Broadcast Engineering
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• v.13 no.6
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• pp.951-961
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• 2008

Cooperative diversity is a cooperative technique which exploits user diversity by decoding the combined signal of the relayed signal and the direct signal in wireless multi-hop networks. Using the cooperation, the performance of the network system can be improved because cooperative diversity which is very strong against the fading channels can be achieved. In this paper, we propose the technique that provides the enhanced visual quality of the reconstructed video using the cooperative diversity with the FMO which is the error resilience tool of H.264/AVC standardization over wireless networks. The eye-tracker can detect the gaze point of user and transmit the gaze information to the nodes. After receiving the gaze information of user, each node performs ROI encoding according to the received gaze information. After encoding, video sources are divided into ROI and Non-ROI. Through the simulation results, the better visual quality of the reconstructed video is achieved when ROI and Non-ROI are transmitted through different channels.

• Journal of IKEEE
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• v.19 no.3
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• pp.424-430
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• 2015

This paper proposes an optical cryptography application to 2-D page-oriented data based on CFB(Cipher Feedback) mode algorithm. The proposed method uses a free-space optical interconnected dual-encoding technique which performs XOR logic operations in order to implement 2-D page-oriented data encryption. The proposed method provides more enhanced cryptosystem with greater security strength than the conventional CFB block mode with 1-D encryption key due to the huge encryption key with 2-D arrayed page type. To verify the proposed method, encryption and decryption of 2-D page data and error analysis are carried out by computer simulations. The results show that the proposed CFB optical encryption system makes it possible to implement stronger cryptosystem with massive data processing and long encryption key compared to 1-D block method.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.44 no.5
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• pp.12-19
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• 2007

This paper presents an ASIP(Application Specific Instruction Set Processor) for implementation of H.264/AVC, called VSIP(Video Specific Instruction-set Processor). The proposed VSIP has novel instructions and optimized hardware architectures for specific applications, such as intra prediction, in-loop deblocking filter, integer transform, etc. Moreover, VSIP has hardware accelerators for computation intensive parts in video signal processing, such as inter prediction and entropy coding. The VSIP has much smaller area and can dramatically reduce the number of memory access compared with commercial DSP chips, which result in low power consumption. The proposed VSIP can efficiently perform in real-time video processing and it can support various profiles and standards.