• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.384-384
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• 2008

그라핀 기판 제작을 위해서는 그라파이트의 탈착이 가장 핵심 기술이다. 본 연구에서는 신뢰성 있는 그라핀 기판 제작을 위해서, HOPG(Highly Ordered Pyrolytic Graphite) 기판에 고농도의 이온을 주입하고, HOPG를 이형기판에 본딩한후, 후속 열처리를 통해 HOPG를 탈착시켜 그리핀을 얻는 일련의 기본 실험에 대한 결과를 보여 주고자 한다. 기대하는 효과는 고농도의 수소/산소 이온의 경우 주입된 고농도의 수소/산소가 후속 열처리동안 이동 및 뭉침현상을 통해 HOPG기판 내에 수소압력(혹은 CO2 발생)을 증가시켜 HOPG를 자르는 것을 기대하고 있다. 일차 수소이온 주입의 실험결과, 기대와는 달리 $900^{\circ}C$ 열처리에도 절단현상이 발견되지 않아서 산소이온주입에 대한 추가실험을 진행 중이다. 그라핀 본딩의 경우 그라핀의 큰 roughness로 인해 $SiO_2$만의 Fusion 본딩은 불가능함을 여러 실험을 통해 알 수 있었고, 현재 SiO2/SOG 혹은 SiO2/Fox를 이용한 본딩실험을 진행중이다.

• Korean Journal of Materials Research
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• v.8 no.11
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• pp.982-986
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• 1998

baking 전후의 금선의 접합강도 변화를 연구하였다. 금선을 이용하여 Si 칩의 AI 패드와 은도금된 리드프레임 사이를 thermosonic 방법으로 본딩하였다. 본딩된 금선을 $175^{\circ}C$에서 시간을 변화시키면서 baking 처리하였다. 접합강도는 와이어 풀 테스트, 볼 전단 테스트, stud 풀 테스트로 평가하였다. 와이어 풀 접합강도는 baking 처리를 거쳐도 크게 변화하지 않았지만 파괴 유형이 baking 전에는 볼목 파괴에서 baking 후 스티치 파괴로 바뀌었다. 본딩과 baking 중 금선의 결정립이 크게 성장하였는데 이런 결정립 크기 변화와 금선 접합 부위의 기하학적인 모양에 따라 파괴 유형이 바뀌었다.

• Electronics and Telecommunications Trends
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• v.9 no.1
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• pp.109-122
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• 1994

소자가 고속, 고주파화 되고 ASIC 칩의 개발이 가속화되면서 패키징과 interconnection 의 중요성이 더욱 증대되고 있다. 소자의 성능에 가장 직접적인 영향을 주는 것이 1차 패키징인데 현재 가장 많이 실행되고 있는 것이 wire 등에 의한 본딩 방법이었다. 이러한 기존의 방법은 소자의 고속화와 입출력 숫자의 증가에 따라 점차 그 한계를 보이고 있는데 이에 대한 방안으로는 플립칩 본딩 방식에 의한 패키징을 들 수 있다. 약 20여년 전에 IBM 에서 개발된 이래 많은 발전을 거듭한 이 기술은 최근 기본 기술에 대한 특허권의 소멸과 함께 많은 응용 분야에서 개발이 활발히 진행되고 있다. 따라서 본 고에서는 향후의 가장 유력한 패키징 기술로 인정되고 있는 플립칩 본딩 기술의 특징과 제조 관련 사항을 정리함과 동시에 응용 분야, 특히, OEIC(Optoelectronics Integrated Circuit) 분야에서의 이용 및 개발 현황을 분석, 소개함으로써 이 새로운 패키징 기술에 대한 인식을 제고하고자 한다.

• 전기의세계
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• v.39 no.6
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• pp.42-49
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• 1990

반도체 조립과 관련하여 다이본딩 시스템, 와이어본딩 시스템 및 인라인 시스템의 구성 및 기능을 살펴보고, 자동화를 위해 필요한 관리제어, 시각처리 및 통신에 대하여 간략하게 알아보고자 한다.

• Korean Chemical Engineering Research
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• v.46 no.2
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• pp.389-396
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• 2008

The effect of thermal cycling on bond strength and residual stress at the interface between benzocyclobutene (BCB) and plasma enhanced chemical vapor deposited (PECVD) silicon dioxide ($SiO_2$) coated silicon wafers were evaluated by four point bending and wafer curvature techniques. Wafers were bonded using a pre-established baseline process. Thermal cycling was done between room temperature and a maximum peak temperature. In thermal cycling performed with 350 and $400^{\circ}C$ peak temperature, the bond strength increased substantially during the first thermal cycle. The increase in bond strength is attributed to the relaxation in residual stress by the condensation reaction of the PECVD $SiO_2$: this relaxation leads to increases in deformation energy due to residual stress and bond strength.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.2
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• pp.59-64
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• 2021

System-in-package (SIP) technology using heterogeneous integration is becoming the key of next-generation semiconductor packaging technology, and the development of low temperature Cu bonding is very important for high-performance and fine-pitch SIP interconnects. In this study the low temperature Cu bonding and the anti-oxidation effect of copper using porous Ag nanolayer were investigated. It has been found that Cu diffuses into Ag faster than Ag diffuses into Cu at the temperatures from 100℃ to 200℃, indicating that solid state diffusion bonding of copper is possible at low temperatures. Cu bonding using Ag nanolayer was carried out at 200℃, and the shear strength after bonding was measured to be 23.27 MPa.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.4
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• pp.109-114
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• 2021

We investigated the effects of atmospheric hydrogen plasma treatment on Cu-Cu direct bonding. Hydrogen plasma was effective in reducing the surface oxide layer of Cu thin film, which was confirmed by GIXRD analysis. It was observed that larger plasma input power and longer treatment time were effective in terms of reduction and surface roughness. The interfacial adhesion energy was measured by DCB test and it was observed to decrease as the bonding temperature decreased, resulting in bonding failure at bonding temperature of 200℃. In case of wet treatment, strong Cu-Cu bonding was observed above bonding temperature of 250℃.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.4
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• pp.331-339
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• 2018

The IEEE 1588, commonly known as a precision time protocol (PTP), is a standard for precise clock synchronization that maintains networked measurements and control systems. The best master clock (BMC) algorithm is currently used to establish the master-slave hierarchy for PTP. The BMC allows a slave clock to automatically take over the duties of the master when the slave is disconnected due to a link failure and loses its synchronization; the slave clock depends on a timer to compensate for the failure of the master. However, the BMC algorithm does not provide a fast recovery mechanism in the case of a master failure. In this paper, we propose a technique that combines the IEEE 1588 with network bonding to provide a faster recovery mechanism in the case of a master failure. This technique is implemented by utilizing a pre-existing library PTP daemon (Ptpd) in Linux system, with a specific profile of the IEEE 1588 and it's controlled through bonding modes. Network bonding is a process of combining or joining two or more network interfaces together into a single interface. Network bonding offers performance improvements and redundancy. If one link fails, the other link will work immediately. It can be used in situations where fault tolerance, redundancy, or load balancing networks are needed. The results show combining IEEE 1588 with network bonding enables an incredible shorter recovery time than simply just relying on the IEEE 1588 recovery method alone.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.4
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• pp.175-182
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• 2017

In light emitting diode (LED) chip packaging, wire bonding is an important process that connects the LED chip on the lead frame pad with the Au wire and enables electrical operation for the next process. The wire bonding process is divided by two types: thermo compression bonding and ultrasonic bonding. Generally, the wire bonding process consists of three steps: 1st ball bonding that bonds the shape of the ball on the LED chip electrode, looping process that hangs the wire toward another connecting part with a loop shape, and 2nd stitch bonding that forms and bonds to another electrode. This study analyzed the factors affecting the LED die bonding processes to optimize the process capability that bonds a small Zener diode chip on the PLCC (plastic-leaded chip-carrier) LED package frame, and then applied response surface analysis. The design of experiment (DOE) was established considering the five factors, three levels, and four responses by analyzing the factors. As a result, the optimal conditions that meet all the response targets can be derived.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.3
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• pp.9-15
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• 2021

Miniaturization of semiconductor devices has recently faced a physical limitation. To overcome this, 3D packaging in which semiconductor devices are vertically stacked has been actively developed. 3D packaging requires three unit processes of TSV, wafer grinding, and bonding, and among these, copper bonding is becoming very important for high performance and fine-pitch in 3D packaging. In this study, the effects of Ti nanolayer on the antioxidation of copper surface and low-temperature Cu bonding was investigated. The diffusion rate of Ti into Cu is faster than Cu into Ti in the temperature ranging from room temperature to 200℃, which shows that the titanium nanolayer can be effective for low-temperature copper bonding. The 12nm-thick titanium layer was uniformly deposited on the copper surface, and the surface roughness (R_q) was lowered from 4.1 nm to 3.2 nm. Cu bonding using Ti nanolayer was carried out at 200℃ for 1 hour, and then annealing at the same temperature and time. The average shear strength measured after bonding was 13.2 MPa.