• The KIPS Transactions:PartA
• /
• v.10A no.2
• /
• pp.123-130
• /
• 2003

This paper presents a new striped checkpointing scheme for serverless cluster computers, where the local disks are attached to the cluster nodes collectively form a distributed RAID with a single I/O space. Striping enables parallel I/O on the distributed disks and staggering avoids network bottleneck in the distributed RAID. We demonstrate how to reduce the checkpointing overhead and increase the availability by striping and staggering dynamically for communication intensive applications. Linpack HPC Benchamark and MPI programs are applied to these checkpointing schemes for performance evaluation on the 16-nodes cluster system. Benchmark results prove the benefits of the striped checkpointing scheme compare to the existing schemes, and these results are useful to design the efficient checkpointing scheme for fast rollback recovery from any single node failure in a cluster system.

• KIPS Transactions on Computer and Communication Systems
• /
• v.2 no.10
• /
• pp.413-420
• /
• 2013

Redundant arrays of independent disks (RAID) without a power-fail-safe component in small and mid-sized business suffers from intolerably long resynchronization time after a unclean power-failure. Data blocks and a parity block in a stripe must be updated in a consistent manner, however a data block may be updated but the corresponding parity block may not be updated when a power goes off. Such a partially modified stripe must be updated with a correct parity block. However, it is difficult to find which stripe is partially updated (inconsistent). The widely-used traditional parity resynchronization manner is a intolerably long process that scans the entire volume to find and fix inconsistent stripes. This paper presents a fast resynchronization scheme with a negligible overhead for small and mid-sized RAIDs. The proposed scheme is integrated into a software RAID driver in a Linux system. According to the performance evaluation, the proposed scheme shortens the resynchronization process from 200 minutes to 5 seconds with 2% overhead for normal I/Os.

• Journal of Digital Contents Society
• /
• v.14 no.2
• /
• pp.191-197
• /
• 2013

To complete the "anywhere" mobile service there should not be shaded areas. However, it is never economical to deploy BS's (Base Stations) in a low population density area due to the low resource utilization. We propose a design technique to install RS's(Relay Stations) which are cheaper than BS's and find the condition in which the proposed technique is acceptible. The proposed design technique aims to allocate the frequency and time resources to RS's to minimize the transmission rate degradation due to interferences between RS's as well as to maximize the parallelism in transmission. We showed by simulation that the proposed technique achieves cost benefits when the expected traffic is less than 20.32 percent of the total BS capacity. The proposed technique is compatible with the IEEE 802.16j, thus can be extended to multi-hop configuration.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.44 no.6 s.360
• /
• pp.24-30
• /
• 2007

In this paper, an energy detection-based low power, low complexity IR-UWB receiver in multipath impulse radio channel is presented. The proposed receiver has a simple 1-bit sampler for energy detection. Also, multipath signal received from multipath impulse radio channel is amplified and envelope of the signal is detected. Then, energy detection technique using integrator by summing multipath signals in certain period is adopted to minimize the BER loss by simple energy detection. In particular, in acquisition of a sample signal, SNR is additionally improved using a digital sampler. Symbol decision using several sampled signals is performed and thus the process of symbol synchronization is significantly simplified. Also, it is effectively designed to be compatible with influences of multipath and timing error. In addition, the proposed receiver complexity is reduced using pulse decision window. The performance of the proposed receiver is simulated based on IEEE 802.15.4a channel model and the algorithms are implemented on FPGA.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.45 no.5
• /
• pp.1-7
• /
• 2008

The general bus architecture consists of masters, slaves, arbiter, decoder and so on in shared bus. Specially, as several masters do not concurrently receive the right of bus usage, the arbiter plays an important role in arbitrating between shared bus and masters. Fixed priority, round-robin, TDMA and Lottery methods are developed in general arbitration policies, which lead the efficiency of bus usage in shared bus. On the other hand, the bus architecture can be modified to maximize the system performance. In the paper, we propose the flying master bus architecture that supports the parallel bus communication and analyze its merits and demerits following various arbitration policies that are mentioned above, compared with normal shared bus. From the results of performance verification using TLM(Transaction Level Model), we find that more than 40% of the data communication performance improves, regardless of arbitration policies. As the flying master bus architecture advances its studies and applies various SoCs, it becomes the leading candidate of the high performance bus architecture.

• Journal of the Computational Structural Engineering Institute of Korea
• /
• v.21 no.1
• /
• pp.113-124
• /
• 2008

Distributed operation of overall structural design process, by which product optimization and process parallelization are simultaneously implemented, is presented in this paper. The database-interacted hybrid method, which selectively takes the accustomed procedure of the conventional method in the framework of the optimal design, is utilized here. The staged application of design constraints reduces the computational burden for large complex optimization problems. Two kinds of numeric and graphic processes are simultaneously implemented by concurrent engineering approach in the distributed environment of PC networks. The former is based on finite element optimization method and the latter is represented by AutoCAD using AutoLISP programming language. Numerical computation and database interaction on servers and graphic works on independent clients are communicated through message passing. The numerical experiments for some steel truss models show the validity and usability of the method. This study has sufficient adaptability and expandability, in that it is based on general methodologies and industry standard platforms.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.17 no.1
• /
• pp.453-458
• /
• 2016

One of the most common applications of machine vision is quality inspections in automated production. In this study, a welding inspection system that is controlled by a PC and a PLC equipped with a multi-camera setup was developed. The system was designed to measure the primary dimensions, such as the length and width of the welding areas. The TCP/IP protocols and multi-threading techniques were used for parallel control of the optical components and physical distribution. A coaxial light was used to maintain uniform lighting conditions and enhance the image quality of the weld areas. The core image processing system was established through a combination of various algorithms from the OpenCV library. The proposed vision inspection system was fully validated for an actual weld production line and was shown to satisfy the functional and performance requirements.

• KIPS Transactions on Computer and Communication Systems
• /
• v.9 no.9
• /
• pp.189-196
• /
• 2020

Recently, GPU cloud computing technology applying GPU(Graphics Processing Unit) devices to virtual machines is widely used in the cloud environment. In a cloud environment, GPU devices assigned to virtual machines can perform operations faster than CPUs through massively parallel processing, which can provide many benefits when operating high-performance computing services in a variety of fields in a cloud environment. In a cloud environment, a GPU device can help improve the performance of a virtual machine, but the virtual machine scheduler, which is based on the CPU usage time of a virtual machine, does not take into account GPU device usage time, affecting the performance of other virtual machines. In this paper, we test and analyze the performance degradation of other virtual machines due to the virtual machine that performs GPGPU(General-Purpose computing on Graphics Processing Units) task in the direct path based GPU virtualization environment, which is often used when assigning GPUs to virtual machines in cloud environments. Then to solve this problem, we propose a GPGPU task management method for a virtual machine.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.16 no.9
• /
• pp.6214-6220
• /
• 2015

A track circuit has used stably more than 100 years for detecting train position, but solution of track circuit sort circuit incapacity due to a rust is necessary for side line in station yard, coast line and level crossing for conventional line in rural line. Domestically, Axle Counter System(ACS) has partially used for Hot Box System for high speed line and turnout for CBTC system. In contrast, most of countries has used ACS not only trunk line but also rural line and its application has increased for metro, electric car and industrial railway. In this paper, we has verified the operating status of ACS which installed with existing track circuit through log analsis to implement pilot application in mail track and turnout in station yard. And interface test with interlocking system has conducted at Obong shunting yard, as well as Cheongju station and has analyzed test result. Based on a test result, we made fail safe design, manufacturing skill and established system requirement specification for the smooth operation and maintenance.

• KIPS Transactions on Software and Data Engineering
• /
• v.2 no.2
• /
• pp.131-136
• /
• 2013

Multi-core processors can improve parallelism of application processes and thus can enhance the system throughput. Researchers have recently revealed that the processor affinity is an important factor to determine network I/O performance due to architectural characteristics of multi-core processors; thus, many researchers are trying to suggest a scheme to decide an optimal processor affinity. Existing schemes to dynamically decide the processor affinity are able to transparently adapt for system changes, such as modifications of application and upgrades of hardware, but these have limited access to characteristics of application behavior and run-time information that can be collected heuristically. Thus, these can provide only sub-optimal processor affinity. In this paper, we define meaningful system variables for determining optimal processor affinity and suggest a tool to gather such information. We show that the implemented tool can overcome limitations of existing schemes and can improve network bandwidth.