• Title/Summary/Keyword: 병렬 전송

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Characteristics of DGS Transmission Line and Influence of Lumped Elements on DGS (Defected Ground Structure를 갖는 전송선로의 특성과 집중소자에 의한 특성)

  • Kim, Chul-Soo;Sung, Jung-Hyun;Kil, Joon-Bum;Kim, Sang-Hyeok;kim, Ho-Sub;Park, Jun-Seok;Ahn, Dal
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.6
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    • pp.946-951
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    • 2000
  • In this paper, we showed the characteristic of transmission line with DCS (Defected Ground Structure), which is etched on the metallic ground plane. And we extracted the equivalent element value of DGS section. Effects of a lumped element placed on DGS section were investigated by employing DGS of dumbbell shape and parallel resonator with DGS. Chip type resistor, inductor, and capacitor were chosen as lumped elements for experiments. Experimental results show that the Q-factor and resonant frequency of the proposed DGS section can be controlled directly by using the external lumped element.

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An Effect of Electrical Interconnect in Optical Transceiver Module (광송수신 모듈 구현을 위한 전기 접속부에 관한 연구)

  • 조인귀;한상필;윤근병;정명영
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.8
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    • pp.863-870
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    • 2003
  • The digital transmission system entered in a RF region as digital system use IC chips of the speeder edge rate and clock speed nowadays. Optical path really was used in order to obtain the more capacity. In this paper, we described importance of electrical interconnect to get the signal integrity in optical module by simulation and experiment. 12 channel${\times}$2.5 G/ps optical parallel transmitter modules were manufactured by two different method ; access lines with microstrip and stripline type. We have clearly shown that the optical module adopting microstrip type with S$\sub$11/ $\geq$ -10 dB presents distortion but the optical module adopting stripline type with S$\sub$11/ $\leq$ : 15 dB obtains eye opening in 2.5 Gbis optical eye pattern response.

A VLSI Implementation of Real-time 8$\times$8 2-D DCT Processor for the Subprimary Rate Video Codec (저 전송률 비디오 코덱용 실시간 8$\times$8 이차원 DCT 처리기의 VLSI 구현)

  • 권용무;김형곤
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.1
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    • pp.58-70
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    • 1990
  • This paper describes a VLSI implementation of real-time two dimensional DCT processor for the subprimary rate video codec system. The proposed architecture exploits the parallelism and concurrency of the distributes architecture for vector inner product operation of DCT and meets the CCITT performance requirements of video codec for full CSIF 30 frames/sec. It is also shown that this architecture satisfies all the CCITT IDCT accuracy specification by simulating the suggested architecture in bit level. The efficient VLSI disign methodology to design suggested architecture is considered and the module generator oriented design environments are constructed based on SUN 3/150C workstation. Using the constructed design environments. the suggensted architecture have been designed by double metal 2micron CMOS technology. The chip area fo designed 8x8 2-D DA-DCT (Distributed Arithmetic DCT) processor is about 3.9mmx4.8mm.

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Realization of the Pulse Doppler Radar Signal Processor with an Expandable Feature using the Multi-DSP Based Morocco-2 Board (다중 DSP 구조의 Morocco-2 보드를 이용한 확장성을 갖는 펄스 도플러 레이다 신호처리기 구현)

  • 조명제;임중수
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1147-1156
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    • 2001
  • In this paper, a new design architecture of radar signal processor in real time is proposed. It has been designed and implemented under the consideration to minimize the inter-processor communication overhead and to maintain the coherence in Doppler pulse domain and in range domain. Its structure can be easily reconfigured and reprogrammed in accordance with an addition of function algorithm or a modification of operational scenario. As we designed a task configuration for parallel processing from measures of computation time for function algorithms and transmission time for results by signal processing, data exchange between processors for performing of function algorithms could be fully removed. Morocco-2 board equipped ADSP-21060 processor of Analog Devices inc. and APEX-3.2 developed for SHARC DSP were used to construct the radar signal processor.

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A New Network Bandwidth Reduction Method of Distributed Rendering System for Scalable Display (확장형 디스플레이를 위한 분산 렌더링 시스템의 네트워크 대역폭 감소 기법)

  • Park, Woo-Chan;Lee, Won-Jong;Kim, Hyung-Rae;Kim, Jung-Woo;Han, Tack-Don;Yang, Sung-Bong
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.10
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    • pp.582-588
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    • 2002
  • Scalable displays generate large and high resolution images and provide an immersive environment. Recently, scalable displays are built on the networked clusters of PCs, each of which has a fast graphics accelerator, memory, CPU, and storage. However, the distributed rendering on clusters is a network bound work because of limited network bandwidth. In this paper, we present a new algorithm for reducing the network bandwidth and implement it with a conventional distributed rendering system. This paper describes the algorithm called geometry tracking that avoids the redundant geometry transmission by indexing geometry data. The experimental results show that our algorithm reduces the network bandwidth up to 42%.

Real-Time Compressed Video Acquisition System for Stereo 360 VR (Stereo 360 VR을 위한 실시간 압축 영상 획득 시스템)

  • Choi, Minsu;Paik, Joonki
    • Journal of Broadcast Engineering
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    • v.24 no.6
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    • pp.965-973
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    • 2019
  • In this paper, Stereo 4K@60fps 360 VR real-time video capture system which consists of video stream capture, video encoding and stitching module is been designed. The system captures stereo 4K@60fps 360 VR video by stitching 6 of 2K@60fps stream which are captured through HDMI interface from 6 cameras in real-time. In video capture phase, video is captured from each camera using multi-thread in real-time. In video encoding phase, raw frame memory transmission and parallel encoding are used to reduce the resource usage in data transmission between video capture and video stitching modules. In video stitching phase, Real-time stitching is secured by stitching calibration preprocessing.

Mutual Authentication Protocol for Safe Data Transmission of Multi-distributed Web Cluster Model (다중 분산 웹 클러스터모델의 안전한 데이터 전송을 위한 상호 인증 프로토콜)

  • Lee, Kee-Jun;Kim, Chang-Won;Jeong, Chae-Yeong
    • The KIPS Transactions:PartC
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    • v.8C no.6
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    • pp.731-740
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    • 2001
  • Multi-distributed web cluster model expanding conventional cluster system is the cluster system which processes large-scaled work demanded from users with parallel computing method by building a number of system nodes on open network into a single imaginary network. Multi-distributed web cluster model on the structured characteristics exposes internal system nodes by an illegal third party and has a potential that normal job performance is impossible by the intentional prevention and attack in cooperative work among system nodes. This paper presents the mutual authentication protocol of system nodes through key division method for the authentication of system nodes concerned in the registration, requirement and cooperation of service code block of system nodes and collecting the results and then designs SNKDC which controls and divides symmetrical keys of the whole system nodes safely and effectively. SNKDC divides symmetrical keys required for performing the work of system nodes and the system nodes transmit encoded packet based on the key provided. Encryption packet given and taken between system nodes is decoded by a third party or can prevent the outflow of information through false message.

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HWbF(Hit and WLC based Firewall) Design using HIT technique for the parallel-processing and WLC(Weight Least Connection) technique for load balancing (병렬처리 HIT 기법과 로드밸런싱 WLC기법이 적용된 HWbF(Hit and WLC based Firewall) 설계)

  • Lee, Byung-Kwan;Kwon, Dong-Hyeok;Jeong, Eun-Hee
    • Journal of Internet Computing and Services
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    • v.10 no.2
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    • pp.15-28
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    • 2009
  • This paper proposes HWbF(Hit and WLC based Firewall) design which consists of an PFS(Packet Filter Station) and APS(Application Proxy Station). PFS is designed to reduce bottleneck and to prevent the transmission delay of them by distributing packets with PLB(Packet Load Balancing) module, and APS is designed to manage a proxy cash server by using PCSLB(Proxy Cash Server Load Balancing) module and to detect a DoS attack with packet traffic quantity. Therefore, the proposed HWbF in this paper prevents packet transmission delay that was a drawback in an existing Firewall, diminishes bottleneck, and then increases the processing speed of the packet. Also, as HWbF reduce the 50% and 25% of the respective DoS attack error detection rate(TCP) about average value and the fixed critical value to 38% and 17%. with the proposed expression by manipulating the critical value according to the packet traffic quantity, it not only improve the detection of DoS attack traffic but also diminishes the overload of a proxy cash server.

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All-port Broadcasting Algorithms on Wormhole Routed Star Graph Networks (웜홀 라우팅을 지원하는 스타그래프 네트워크에서 전 포트 브로드캐스팅 알고리즘)

  • Kim, Cha-Young;Lee, Sang-Kyu;Lee, Ju-Young
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.2
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    • pp.65-74
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    • 2002
  • Recently star networks are considered as attractive alternatives to the widely used hypercube for interconnection networks in parallel processing systems by many researchers. One of the fundamental communication problems on star graph networks is broadcasing In this paper we consider the broadcasting problems in star graph networks using wormhole routing. In wormhole routed system minimizing link contention is more critical for the system performance than the distance between two communicating nodes. We use Hamiltonian paths in star graph to set up link-disjoint communication paths We present a broadcast algorithm in n-dimensional star graph of N(=n!) nodes such that the total completion time is no larger than $([long_n n!]+1)$ steps where $([long_n n!]+1)$ is the lower bound This result is significant improvement over the previous n-1 step broadcasting algorithm.

Efficiency Low-Power Signal Processing for Multi-Channel LiDAR Sensor-Based Vehicle Detection Platform (멀티채널 LiDAR 센서 기반 차량 검출 플랫폼을 위한 효율적인 저전력 신호처리 기법)

  • Chong, Taewon;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.7
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    • pp.977-985
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    • 2021
  • The LiDAR sensor is attracting attention as a key sensor for autonomous driving vehicle. LiDAR sensor provides measured three-dimensional lengths within range using LASER. However, as much data is provided to the external system, it is difficult to process such data in an external system or processor of the vehicle. To resolve these issues, we develop integrated processing system for LiDAR sensor. The system is configured that client receives data from LiDAR sensor and processes data, server gathers data from clients and transmits integrated data in real-time. The test was carried out to ensure real-time processing of the system by changing the data acquisition, processing method and process driving method of process. As a result of the experiment, when receiving data from four LiDAR sensors, client and server process was operated using background or multi-core processing, the system response time of each client was about 13.2 ms and the server was about 12.6 ms.