• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.1
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• pp.21-28
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• 2012

In this paper, we propose a flexible zeroth-order resonant(ZOR) antenna. Its zero phase constant ensures that the antenna performance is independent of substrate deformation. A composite right/left-handed transmission line is designed based on coplanar waveguide technology to realize the zeroth-order resonance phenomenon. The CRLH is an implementation of metamaterial(left handed material) which is composed of shunt inductance and series capacitance. In order to yield additional circuital parameter, chip inductor and gap capacitor is added, respectively. The proposed ZOR antenna provides good performances: reasonable bandwidth(6.5 %) and peak gain(0.69~1.39 dBi). Simulated and measured results show that the antenna's resonant frequencies and radiation patterns are almost unchanged at different curvature diameters of 30, 50, 70 mm, as well as for a flat surface.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.373-376
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• 2003

This paper presents a new, three-dimensional round-robin scheduler that provides high throughput and fair across in an advanced input-queued packet switch using shared input buffers. We consider an architecture in which each input port group shares a common buffer and maintains a separate queue for each output, which is ratted the distributed common input buffer switch. In an NxN switch, our scheduler determines which queue in the total MxN input queues is served during each time slot where M is the number of common buffers. We suppose that each common buffer has K input ports and K output ports, and manages N output queues. The 3DRR scheduler determines MxK queues in every K(M) cycle when $K\geq$M (K$\leq$M), and provides massively parallel processing for the applications of high-speed switches with a large number of ports. The 3-DRR scheduler can be implemented using duplicated simple logic components allowing very high-speed implementation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.1
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• pp.170-178
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• 2004

In this work a high speed 8-error correcting Reed-Solomon decoder is designed using the modified Euclid algorithm. Decoding algorithm of Reed-Solomon codes consists of four steps, those are, compute syndromes, find error-location polynomials, decide error-locations, and determine error values. The decoding speed is increased and the latency is reduced by using the parallel architecture in the syndrome generator and a faster clock speed in the modified Euclid algorithm block. In addition. the error locator polynomial in Chien search block is separated into even and odd terms to increase the overall speed of the decoder. All the functionalities of the decoder are verified first through C++ programs. Verilog is used for hardware description, and then the decoder is synthesized with a $.25{\mu}m$ CMOS TML library. The functionalities of the chip is also verified through test vectors. The clock speed of the chip is 250MHz, and the maximum data rate is 1Gbps.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.12B
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• pp.1601-1610
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• 2011

This paper discusses standardization activities, requirements and enabling technologies for 100G Ethernet and 100G OTN. The need of 100Gbps transport capacity has been gaining greater interest from service providers and carrier vendors. Moreover, optical transport networks based on OTN/DWDM are changing their properties to apply Ethernet traffic which is dramatically increasing. We realize and experimentally demonstrate OTU4 framer with commercial FPGA. The key features of the realized OTU4 framer are parallel signal processing function, multi-lane distribution function, GMP function and FEC function. The realized OTU4 framer has the large signal processing capacity of 120Gbps, which allows to transport about 120Gbps client signals such as $12{\times}10G$ Ethernet and $3{\times}40G$ Ethernet. The realized OTU4 framer has the advantages to quickly adjust to changing markets and new technologies by using commercial FPGA instead of ASIC.

• Journal of the Korean Society for Railway
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• v.20 no.2
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• pp.190-195
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• 2017

This paper proposes a method to detect rail broken through impedance measurement. In general, broken rails are detected in real time using the track circuit, but the proposed method not only detects the broken rails but also estimates positions of broken areas by measuring the rail impedance. To electrically insulate one side of the rail, parallel resonance is made by adding a capacitor; then, the impedance of the other rail is measured. If the measured impedance has an inductive value, there is no broken area of rail. However if the measured impedance has a capacitive value, the rail is broken. The proposed method is modeled using a transmission line; it is shown that the modeling can estimate the position of the broken rail according to the impedance value. The rail impedance is measured by the proposed method for a 60m simple rail model, and it is verified that the presence of a broken rail changes the rail impedance.

• The Transactions of the Korea Information Processing Society
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• v.4 no.5
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• pp.1172-1181
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• 1997

A militimedia data is a data mixed of formatted data like an audio and video. Multimedia data has characteristics that it need large amount of storage,wide network bandwith andreal time responsibolity. Because of these characteristocs, the VOD server and continous media storage server have a disk stripe structure or disk stripe sructure or disk array structure(RAID).In the parallel disk access system,high-speed play-back of continous media using segment interleavung may not ensure Qos pf other cioents because of the concentrated load within some disks. The load concentration of disks is related to both the number of disks in the system and playback rate of contimous media.In this paper. we describe that high-speed playback scheme,which is independent of the number of disk and plyback rate can be achieved by technique of changing the in-teval of access to segnent location.We show the experimental result of this technique in this pater.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.42 no.1
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• pp.13-21
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• 2005

This paper presents a fuzzy model-based approach for synchronization of time-delay chaotic system with input saturation. Time-delay chaotic drive and response system is respectively represented by Takagi-Sugeno (T-S) fuzzy model. Specially, the response system contains input saturation. Using the unidirectional linear error feedback and the parallel distributed compensation (PDC) scheme, we design fuzzy chaotic synchronization system and analyze local stability for synchronization error dynamics. Since time-delay in the transmission channel always exists, we also take it into consideration. The sufficient condition for the local stability of the fuzzy synchronization system with input saturation and time-delay is derived by applying Lyapunov-Krasovskii theory and solving linear matrix inequalities (LMI's) problem. A numerical example is given to demonstrate the validity of the proposed approach.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.5
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• pp.333-340
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• 2003

Doppler processing is the heart of pulsed Doppler radar. It gives a clutter elimination and coherent integration. With the improvement of digital signal processors (DPSs), the implementation using them is more widely used in radar systems. Generally, so as for Doppler processor to process the input data in real time, a parallel processing concept using multiple DSPs should be used. This paper implements a programmable Doppler processor, which consists of MTI filter, DFB and square-law detector, using 8 ADSP21060s. Formulating the distribution time of the input data, the transfer time of the output data and the time required to compute each algorithm, it estimates total processing time and the number of required DSP. Finally, using the TSG that provides radar control pulses and simulated target signals, performances of the implemented Doppler processor are evaluated.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.8
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• pp.27-35
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• 1999

A radius of ring resonator is determined by the resonant frequency. Resonant frequencies of resonators with the circumference which is integer times of wave length are not same the expected. In this paper, we suggest the design method of a ring resonator with coupling gap, which has the resonant frequency of desire. The equation which can make reduction of the radius of the resonators depending on the gap space is derived by the method of transmission line analysis. The criterion is suggested to determine the radius of the resonator in accordance with relative permittivity. A ring resonator by the proposed method is as small as one-third of basic ring in size and it has the resonant frequency of desire. T-type coupling line is designed to obtain large attenuation of $S_{11}$ at pass-band. These coupling line capacitances are very lower than the gap capacitances, it does not affect the resonant frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.1
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• pp.35-41
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• 1997

A series-fed microstrip array antenna of beamwidth $10^{\circ}$, squint angle $80^{\circ}$ and SLL -15 dB below is designed. Series-fed arrays are formed by interconnecting all the elements by high-impedance transmission lines and feeding the power at the first element and it is a traveling-wave antenna which is terminated with a matched load. Radiation patterns and impedance matching of the antenna are analyzed by Ensemble 4.0, which is a popular software package for designing printed antennas and arrays. The squint angle of beam can be controlled by the spacing between the elements. The major advantages of series-fed array antennas are that feed arangement is compact and the losses associated with the feeding network are less than those of a corporate feed type. The antennas are fabricated on the RT/Duroid Laminates of 62 mil thickness. The experimental results are very close to the specifications to be designed.