• Journal of Korea Society of Industrial Information Systems
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• v.10 no.4
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• pp.16-25
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• 2005

In this paper, we proposed a novel algorithm combined simulated annealing and genetic algorithms for designing optimal binary phase computer generated hologram. In the process of genetic algorithm searching by block units, after the crossover and mutation operations, simulated annealing algorithm searching by pixel units is inserted. So, the performance of BPCGH was improved. Computer simulations show that the proposed combined iterative algorithm has better performance than the simulated annealing algorithm in terms of diffraction efficiency

• The KIPS Transactions:PartC
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• v.17C no.2
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• pp.145-152
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• 2010

In this paper, we first propose a fast division algorithm in GF($2^{163}$) using standard basis representation, and then it is mapped into divider for GF($2^{163}$) with iterative hardware structure. The proposed algorithm is based on the binary ExtendedGCD algorithm, and the arithmetic operations for modular reduction are performed within only one "while-statement" unlike conventional approach which uses two "while-statement". In this paper, we use reduction polynomial $f(x)=x^{163}+x^7+x^6+x^3+1$ that is recommended in SEC2(Standards for Efficient Cryptography) using standard basis representation, where degree m = 163. We also have implemented the proposed iterative architecture in FPGA using Verilog HDL, and it operates at a clock frequency of 85 MHz on Xilinx-VirtexII XC2V8000 FPGA device. From implementation results, we will show that computation speed of the proposed scheme is significantly improved than the existing two approaches.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.1198-1203
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• 2008

An efficient sequential optimization approach for metamodel was presented by Choi et al [6]. This paper describes a new approach of the multilevel optimization method studied in Refs. [5] and [21-25]. The basic idea is concerned with multilevel iterative methods which combine a descent scheme with a hierarchy of auxiliary problems in lower dimensional subspaces. After fitting a metamodel based on an initial space filling design, this model is sequentially refined by the expected improvement criterion. The advantages of the method are that it does not require optimum sensitivities, nonlinear equality constraints are not needed, and the method is relatively easy to understand and use. As a check on effectiveness, the proposed method is applied to a classical cantilever beam.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.7B
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• pp.996-1005
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• 2001

본 논문에서는 ASIC 벤더의 셀 라이브러리와 MUX-based FPGA에 있는 고정된 입력을 갖는 연결구조의 수를 최소화하는 하드웨어 할당 알고리듬을 제안한다. 제안된 할당 알고리듬은 연산자간을 연결하는 신호선이 반복적으로 이용되어 연결 신호선 수가 최소가 될 수 있도록 연산자를 할당한다. 연결 구조를 고려한 이분할 그래프에 가중치를 설정하고 변수와 레지스터간의 최대 가중치 매칭을 구함으로써 레지스터 할당을 수행한다. 또한 연결구조에 대한 멀티플렉서의 중복 입력을 제거하고 연산자에 연결된 멀티플렉서간의 입력을 교환하는 입력 정렬 과정으로 연결구조를 최소화한다. 벤치마크 실험을 통하여 제안된 알고리즘의 효용성을 보인다.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.6 no.3
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• pp.165-173
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• 2007

In this paper, we propose a new minimum resources allocation algorithm for optimal design automation. In the proposed algorithm, the operation are allocated to functional units so that the number of interconnection wires between functional units can be minimized. The registers are allocated to the maximal clusters generated by the minimal cluster partitioning algorithm. Finally, the interconnection is minimized by removing the duplicated inputs of multiplexers and exchanging the inputs across multiplexers. The efficiency of the proposed allocation algorithm is shown by experiments using benchmark examples.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.801-809
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• 2007

LDPC Low Density Parity Check) code, which is an error correcting code determined to be applied to the 4th generation mobile communication systems, requires a heavy computational complexity due to iterative decodings to achieve a high BER performance. This paper proposes an algorithm to reduce the number of decoding iterations to increase performance of the decoder in decoding latency and power consumption. Measuring changes between the current decoded LLR values and previous ones, the proposed algorithm predicts directions of the value changes. Based on the prediction, the algorithm inverts the sign bits of the LLR values to speed up convergence, which means parity check equation is satisfied. Simulation results show that the number of iterations has been reduced by about 33% without BER performance degradation in the proposed decoder, and the power consumption has also been decreased in proportional to the amount of the reduced decoding iterations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.12
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• pp.2386-2396
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• 1994

In this paper, an optimal algorithm for the design of 1-D FIR filters with finite precision coefficients is proposed. The algorithm is based on the observation that the frequency constraints of a sub-problems(SP) in the branch and bound algorithm, which repeatedly use LP(linear programming), are closely related with those of neighboring SPs. By using the relationship between the SPs, the proposed algorithm reduces the number of constraints required for solving each SP with Lp, whereas the conventional algorithm employs all the constraints, which are required for solving the initial problem. Thus, the overall computational load for the design of FIR filters with finite precision coefficients is significantly alleviated, compared to the conventional branch and bound algorithm. Also, a new branching scheme for the design of FIR filters with sum-of-power-of-two(SOPOT) coefficients is proposed. It is shown that the computational load for the design fo SOPT coefficient filters can be further reduced with the new branching scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2C
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• pp.117-122
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• 2006

In this paper, we present a simple and general soft bit decision expression for a Gray coded PAM signal over additive white Gaussian noise(AWGN) channel with the log likelihood ratio(LLR). In order to reduce the complexity of the LLR calculation, we make the bitwise LLR expression simple by replacing the mathematical max functions of the conventional Max-Log-MAP expression with simple arithmetic functions associated with some deterministic parameters, such as a received value and distance between symbols on a signal space. Taking the implementation issues, like the area of silicon, the power consumption, the timing latency, and so on, into consideration, we submit that the proposed method is a promising alternative way to conventional methods for reconfigurable systems.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.3
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• pp.19-25
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• 2009

In this thesis, design effective elimination interference algorithm of ICS repeat system for repeater that improve frequency efficiency. Error convergence speed and accuracy of LMS Algorithm are influenced by reference signal. For improve LMS Algorithm, suggest Adaptive channel estimate algorithm. For using channel characteristic, adaptive channel estimate algorithm make reference signal similar interference signal by convolution operation and complement LMS algorithm demerit. For make channel similar piratical channel, apply Jake's Rayleigh multi-path model that random five path with 130Hz Doppler frequency. LMS algorithm and suggested adaptive channel estimate algorithm that have 16 taps apply to ICS repeat system under Rayleigh multi-path channel, so simulate with MATLAB. According to simulate, ICS repeat system with LMS algorithm show -40dB square error convergent after 150 datas iteration and ICS repeat system with adaptive channel estimate algorithm show -80dB square error convergent after 200 datas iteration. Analyze simulation result, suggested adaptive channel estimate algorithm show more three times iteration performance than LMS algorithm, and 40dB accuracy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.9
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• pp.995-1000
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• 2016

The maximum cross-correntropy (MCC) algorithm with a set of random symbols keeps its optimum weights undisturbed from impulsive noise unlike MSE-based algorithms and its main factor has been known to be the input magnitude controller (IMC) that adjusts the input intensity according to error power. In this paper, a normalization of the step size of the MCC algorithm by the power of IMC output is proposed. The IMC output power is tracked recursively through a single-pole low-pass filter. In the simulation under impulsive noise with two different multipath channels, the steady state MSE and convergence speed of the proposed algorithm is found to be enhanced by about 1 dB and 500 samples, respectively, compared to the conventional MCC algorithm.