• Title/Summary/Keyword: 몫의 반올림

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A study on improper notions appeared in dealing with quotient and remainder in division for decimal numbers in Korean elementary math textbooks and its improvements (우리나라 초등학교 수학 교과서의 소수 나눗셈에서의 몫과 나머지 취급에서 나타나는 부적절한 관념과 그 개선에 관한 연구)

  • Park, Kyosik;Kwon, Seokil
    • Journal of Educational Research in Mathematics
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    • v.22 no.4
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    • pp.445-458
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    • 2012
  • Current textbooks may provide students and teachers with three improper notions related to the quotient and the remainder in division for decimal numbers as in the following. First, only the calculated results in (natural numbers)${\div}$(natural numbers) is the quotient. Second, when the quotient and the remainder are obtained in division for decimal numbers, the quotient is natural number and the remainder is unique. Third, only when the quotient cannot be divided exactly, the quotient can be rounded off. These can affect students and teachers on their notions of division for decimal numbers, so improvements are needed for to break it. For these improvements, the following measures are required. First, in the curriculum guidebook, the meaning of the quotient and the remainder in division for decimal numbers should be presented clearly, for preventing the possibility of the construction of such improper notions. Second, examples, problems, and the like should be presented in the textbooks enough to break such improper notions. Third, the didactical intention should be presented clearly with respect to the quotient and the remainder in division for decimal numbers in teacher's manual.

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Design of an optimized Divider for a Quantizer (Quantizer를 위한 최적화된 Divider 구현)

  • 김재우;조태헌;남기훈;이광엽
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.835-838
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    • 2003
  • 본 논문에서는 현재 MPEG, JPEG 압축 알고리즘에서 쓰이는 DCT(Discrete Cosine Transform)기반의 손실 영상 압축에 사용되는 양자화(Quantization) 처리에 필요한 나눗셈 연산기를 제안한다. 영상 데이터 처리를 위한 양자화기(Quantizer)는 DCT로부터 매 사이클마다 영상 데이터를 입력 받아 양자화 처리를 해야하며 보다 나은 영상 데이터를 위해 최종 나눗셈 결과 즉, 몫을 소수 첫째자리에서 반올림(Rounding)해야 한다. 이를 위해 반올림 동작이 추가된 Pipelined Nonrestoring Array Divider를 설계하였다. 제안된 방법의 타당성을 검증하기 위해 DCT로부터 나온 영상 데이터를 제안된 구조의 양자화기로 양자화하여 일반 양자화기에서 나온 압축된 데이터와 비교해 보았다. 또한 합성기(Synthesis)를 통하여 실제 하드웨어 크기를 분석하였다.

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Exploring the Issues and Improvements of the Quotient and the Reminder of the Decimal Division (소수 나눗셈의 몫과 나머지에 대한 논점과 개선 방안)

  • Lee, Hwayoung
    • Education of Primary School Mathematics
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    • v.24 no.2
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    • pp.103-114
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    • 2021
  • In this study I recognized the problems with the use of the terms 'quotient' and 'reminder' in the division of decimal and explored ways to improve them. The prior studies and current textbooks critically analyzed because each researcher has different views on the use of the terms 'quotient' and 'reminder' because of the same view of the values in the division calculation. As a result of this study, I proposed to view the result 'q' and 'r' of division of decimals by division algorithms b=a×q+r as 'quotient' and 'reminder', and the amount equal to or smaller to q the problem context as a final 'result value' and the residual value as 'remained value'. It was also proposed that the approximate value represented by rounding the quotient should not be referred to as 'quotient'.

A Design of Radix-2 SRT Floating-Point Divider Unit using ]Redundant Binary Number System (Redundant Binary 수치계를 이용한 radix-2 SRT부동 소수점 제산기 유닛 설계)

  • 이종남;신경욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.3
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    • pp.517-524
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    • 2001
  • This paper describes a design of radix-2 SRT divider unit, which supports IEEE-754 floating-point standard, using redundant binary number system (RBNS). With the RBNS, the partial quotient decision logic can operate about 20-% faster, as well as can be implemented with a simple hardware when compared to the conventional methods based on two's complement arithmetic. By using a new redundant binary adder proposed in this paper, the mantissa divider is efficiently implemented, thus resulting in about 20% smaller area than other works. The divider unit supports double precision format, five exceptions and four rounding modes. It was verified with Verilog HDL and Verilog-XL.

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