• Title/Summary/Keyword: 디지털 시그널 프로세서

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Implementation of LTE Transport Channel on Multicore DSP Software Defined Radio Platform (멀티코어 DSP 기반 소프트웨어 정의 라디오 플랫폼을 활용한 LTE 전송 채널의 구현)

  • Lee, Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.4
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    • pp.508-514
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    • 2020
  • To implement the continuously evolving mobile communication standards such as Long Term Evolution (LTE) and 5G, the Software Defined Radio (SDR) concept provides great flexibility and efficiency. For many years, a high-end Digital Signal Processor (DSP) System on Chip (SoC) has been developed to support multicore and various hardware coprocessors. This paper introduces the implementation of the SDR platform hardware using TI's TCI663x chip. Using the platform, LTE transport channel is implemented by interworking multicore DSP with Bit rate Coprocessor (BCP) and Turbo Decoder Coprocessor (TCP) and the performance is evaluated according to various implementation options. In order to evaluate the performance of the implemented LTE transport channel, LTE base station system was constructed by combining FPGA main board for physical channels, SDR platform board, and RF & Antenna board.

Design of the Expanded Interrupt Controller using VHDL (VHDL을 이용한 확장 인터럽트 제어기의 설계)

  • 박성수;박승엽
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.3
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    • pp.558-567
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    • 2003
  • Most digital signal processors provide 4 external interrupt input channels. But these are not sufficient for external interrupts of motor controls. Customized programmable interrupt controller, 8259, has 8 interrupt channels. Therefore, in the case of more external interrupt channels are needed, designers must expand by cascading the 8259. And this, 8259 device, have some inconvenience of interfacing the microprocessor in motor controls. In this paper, the expanded interrupt controller with 14 sufficient interrupt input channels for motor controls is designed using VHDL on the purpose of interfacing the microprocessor to the interrupt controller more compatibly and increasing the device utilization of FPGA/CPLD designed another peripherals. The interrupt controller model and each function blocks is proposed and illustrated. Simulation result are presented to estimate the designed interrupt controller.

The Adaptive-Neuro Control of Robot Manipulator Using DSPs (디지털 시그널 프로세서를 이용한 로봇 매니퓰레이터의 적응-신경제어)

  • 이우송;차보남;김영규;김용태;한성현
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2002.04a
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    • pp.573-578
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    • 2002
  • In this paper, it Is presented a new scheme of adaptive-neuro control system to implement real-time control of robot manipulator. Unlike the well-established theory for the adaptive control of linear systems, there exists relatively little general theory for the adaptive control of nonlinear systems. Adaptive control technique is essential for providing a stable and robust performance for application of robot control. The proposed neuro control algorithm is one of learning a model based error back-propagation scheme using Lyapunov stability analysis method. Through simulation, the proposed adaptive-negro control scheme is proved to be a efficient control technique for real-time control of robot system using DSPs.

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The Adaptive-Neuro Control of Robot Manipulator Using DSPs (디지털 시그널 프로세서를 이용한 로봇 매니퓰레이터의 적응-신경제어)

  • Cha, Bo-Ram;Kim, Seong-Il;Lee, Jin;Lee, Chi-U;Han, Seong-Hyeon
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2001.10a
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    • pp.122-127
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    • 2001
  • In this paper, it is presented a new scheme of adaptive-neuro control system to implement real-time control of robot manipulator. Unlike the well-established theory for the adaptive control of linear systems, there exists relatively little general theory for the adaptive control of nonlinear systems. Adaptive control technique is essential for providing a stable and robust performance for application of robot control. The proposed neuro control algorithm is one of learning a model based error back-propagation scheme using Lyapunov stability analysis method. Through simulation, the proposed adaptive-neuro control scheme is proved to be a efficient control technique for real-time control of robot system using DSPs.

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Implementation of Brushless Linear Motor Driver (브러쉬없는 리니어 모터 드라이브 구현)

  • 김상우;박정일;이기동;정재한;서경열
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.05a
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    • pp.969-972
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    • 2000
  • In this paper, a controller design for brushless linear motor is proposed. The designed controller is mainly composed of speed and current controller, which are carried out by the high-speed digital signal processor(DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented using by 32-bit DSP(TMS320C31), a high-integrated logic device(EPM7128), and IPM(Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for the brushless linear motor.

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On Designing 4-way Superscalar Digital Signal Processor Core (4-way 수퍼 스칼라 디지털 시그널 프로세서 코어 설계)

  • 김준석;유선국;박성욱;정남훈;고우석;이근섭;윤대희
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.6
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    • pp.1409-1418
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    • 1998
  • The recent audio CODEC(Coding/Decoding) algorithms are complex of several coding techniques, and can be divided into DSP tasks, controller tasks and mixed tasks. The traditional DSP processor has been designed for fast processing of DSP tasks only, but not for controller and mixed tasks. This paper presents a new architecture that achieves high throughput on both controller and mixed tasks of such algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates four algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates functional units (Multiplier, two ALUs, Load/Store Unit) in parallel via 4-issue super-scalar instruction structure. The performance evaluation of YSP-3 has been done through the implementation of the several DSP algorithms and the part of the AC-3 decoding algorithms.

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Design of Adaptive-Neuro Controller of SCARA Robot Using Digital Signal Processor (디지털 시그널 프로세서를 이용한 스카라 로봇의 적응-신경제어기 설계)

  • 한성현
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.6 no.1
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    • pp.7-17
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    • 1997
  • During the past decade, there were many well-established theories for the adaptive control of linear systems, but there exists relatively little general theory for the adaptive control of nonlinear systems. Adaptive control technique is essential for providing a stable and robust performance for application of industrial robot control. Neural network computing methods provide one approach to the development of adaptive and learning behavior in robotic system for manufacturing. Computational neural networks have been demonstrated which exhibit capabilities for supervised learning, matching, and generalization for problems on an experimental scale. Supervised learning could improve the efficiency of training and development of robotic systems. In this paper, a new scheme of adaptive-neuro control system to implement real-time control of robot manipulator using digital signal processors is proposed. Digital signal processors, DSPs, are micro-processors that are developed particularly for fast numerical computations involving sums and products of variables. The proposed neuro control algorithm is one of learning a model based error back-propagation scheme using Lyapunov stability analysis method. The proposed adaptive-neuro control scheme is illustrated to be an efficient control scheme for implementation of real-time control for SCARA robot with four-axes by experiment.

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발사체 추력백터제어 구동장치용 컴퓨터 하드웨어 설계

  • Park, Moon-Su;Lee, Hee-Joong;Min, Byeong-Joo;Choi, Hyung-Don
    • Aerospace Engineering and Technology
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    • v.3 no.2
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    • pp.56-64
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    • 2004
  • In this research, design results of computer hardware which control solid motor movable nozzle thrust vector control(TVC) actuator for Korea Space Launch Vehicle I(KSLV-I) are described. TVC computer hardware is the equipment which has jobs for receiving control commands from Navigation Guidance Unit(NGU) and then actuating TVC actuator. Also, it has ability to communicate with other on board or ground equipments. Computer hardware has a digital signal processor as the main processor which is capable of high speed calculating ability of control algorithm, so it can have more stability, reliability and flexibility than the previous analog controller of KSR-III. Target board was designed for on board program development and then first prototype hardware was developed. Top level system design criteria, hardware configurations and ground support equipment of TVC computer system are described.

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Development of DSP-based Modbus Communication Scheme and Control Module for Controlling Actuators in Industrial Equipment (산업용 장비에서의 액추에이터를 제어 하기 위한 DSP에서의 Modbus통신 구현과 제어 모듈 개발)

  • Kim, Won-Jun;Gwak, Dong-Gi;Kim, Dong Hwan
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.41 no.11
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    • pp.1109-1117
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    • 2017
  • In this work, a new control module and communication system associated with DSP are proposed to overcome the limitations of the contemporary prevailing PLC-based industrial equipment controller, and the performance of the proposed system was experimentally verified. In the light of this issue, a communication conversion scheme from RS-485 to Modbus, the dominant communication protocol used by PLC, was developed and shown to yield enhanced compatibility between devices. The proposed system allows for ~50% cost reduction as well as downsizing of the industrial controllers. Furthermore, the design includes 24 V general digital I/O pins, which facilitate partial expansion of inputs and outputs. With Modbus communication implemented in DSP with the RS-485 interface, multi-to-multi communication may also be achieved.

Low Power Digital Servo Architecture for Optical Disc (광디스크 디지털 서보의 저전력 구현 아키텍쳐)

  • Huh, Jun-Ho;Kim, Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.38 no.2
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    • pp.31-37
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    • 2001
  • Digital servo implementation in optical servo chip has been spotlighted since it is easy to integrate with other blocks and it has less sensitive characteristics change in terms of temperature variation and better flexibility to the system variation like pick-up. Therefore, Optical disc players adopted digital servo are increasing in market. However, one drawback of digital signal processor embedded digital servo is power consumption that is one of the most important factors of portable optical disc player system. For that reason, this paper introduces new architecture to reduce power consumption of digital servo by means of reducing DSP load but increasing minimum hardware size. The main idea of reducing power consumption of digital servo greatly is utilizing CDP characteristics as most operations are done and used up most operating steps of DSP at the initial time, but most power consumption is occurred in play mode. Therefore, if operating steps for digital filtering in play mode could be reduced greatly, power consumption of overall system can be reduced greatly. This paper shows an example that low power digital servo architecture whose current is reduced almost 83%, compare to that of digital servo which is not applied by the low power architecture introduced in this paper.

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