• Title/Summary/Keyword: 디지털신호처리칩

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A FSK Radio-telemetry System for Monitoring Vital Signs in UHF Band (UHF 대역 FSK에 의한 생체신호 무선 전송장치의 개발)

  • Park D.C.;Lee H.K.
    • Journal of Biomedical Engineering Research
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    • v.21 no.3 s.61
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    • pp.255-260
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    • 2000
  • This paper presents a radio-telemetry patient monitor. which is used for intensive cal?e units. emergency and surgical operation rooms to monitor continuously patients' vital signs. The radio-telemetry patient monitor consists of a vital sign acquisition unit. wireless data transmission units and a vital sign-monitoring unit. The vital sign acquisition unit amplifies biological signals, performs analog signal to serial digital data conversion using the one chip micro-controller. The converted digital data is modulated FSK in UHF band using low output power and transmitted to a remote site in door. In comparison with analog modulation. FSK has major advantages to improve performance with respect to noise resistance with fower error and the potential ability to process and Improve quality of the received data. The vital sign-monitoring unit consists of the receiver to demodulate the modulated digital data, the LCD monitor to display vital signs continuously and the thermal head printer to record a signal.

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A study on the digital carrier recovery loop with adaptive loop bandwidth (적응 루프 대역폭을 가진 디지털 반송파 동기 루프에 관한 연구)

  • 한동석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.8
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    • pp.1774-1781
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    • 1997
  • In this paper, we propose a full digital frequency and phase locked loop for CATV and HDTV receivers adopting VSB modulation. The CATV and HDTV receivers proposed by the Grand-Alliance in USA are ultilizing analog signal processing technology for carrier recovery. By the way, it is not a good architecture for the development of single chip ASIC operating in digital domain. To solve this problem while improving the performance, we first down convert the received r.f. signal to a near baseband signal for a low-rate AD converter and then we use digital signal processing techniques. The proposed system has the frequency pull-in range of -200 KHz +2.50 KHz. Moreover, it has the ability of adaptive loop bandwidth control according to the amount of frequency offset to improve the acquisition time while reducing the phase noise.

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Implementation of Real-time Stereo Frequency Demodulator Using RTL-SDR (RTL-SDR을 이용한 스테레오 주파수 변조 방송의 실시간 수신기 구현)

  • Kim, Young-Ju
    • Journal of Broadcast Engineering
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    • v.24 no.3
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    • pp.485-494
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    • 2019
  • A software-driven real-time frequency de-modulator is implemented with the aid of universal-serial-bus (USB) type software defined radio dongle. An analog stereo frequency modulation (FM) broadcast signal is down-converted to the basedband analog signal then converted to digital bit streams in the USB dongle. Computer software such as Matlab, Python, and GNU Radio manipulates the incoming bit streams with the technique of digital signal processing. Low pass filtering, band pass filtering, decimation, frequency discriminator, double sideband amplitude demodulation, phase locked loop, and deemphasis function blocks are implemented using such computer languages. Especially, GNU Radion is employed to realize the real-time demodulator.

Design and implementation of comb filter for multi-channel, 24bit delta-sigma ADC (다채널 24비트 델타시그마 ADC 용 콤필터 설계 및 구현)

  • Hong, Heedong;Park, Sangbong
    • The Journal of the Convergence on Culture Technology
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    • v.6 no.3
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    • pp.427-430
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    • 2020
  • The multi-channel analog signal to digital signal conversion is increasing in the field of IoT and medical measurement equipments. It has chip area and power consumption constraints to use a few single or 2_channel ADC for multi_channel application. This paper described to design and implement a proposed comb filter for multi-channel, 24bit ADC. The function of proposed comb filter is verified by matlab simulation and the FPGA test board. It was fabricated using SK Hynix 0.35㎛ CMOS standard process. The performance and chip size is compared with the existing design method that uses integrator/differentiator and FIR construction. The proposed comb filter is expected to use the IoT product and medical measurement equipments that require multi-channel, low power consumption and small hardware size.

A Design and Implementation of NFC Bridge Chip (NFC 브릿지 칩 설계 및 구현)

  • Lee, Pyeong-Han;Ryu, Chang-Ho;Chun, Sung-Hun;Kim, Sung-Wan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.3
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    • pp.96-101
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    • 2015
  • This paper describes a design and implementation of the NFC bridge chip which performs interface between kinds of devices and mobile phones including NFC controller through NFC communication. The NFC bridge chip consists of the digital part and the analog part which are based on NFC Forum standard. Therefore the chip treats RF signals and then transforms the signal to digital data, so it can interface kinds of devices with the digital data. Especially the chip is able to detect RF signals and then wake up the host processor of a device. The wakeup function dramatically decreases the power consumption of the device. The carrier frequency is 13.56MHz, and the data rate is up to 424kbps. The chip has been fabricated with SMIC 180nm mixed-mode technology. Additionally an NFC bridge chip application to the blood glucose measurement system is described for an application example.

Implementation of Auto-tuning Positive Position Feedback Controller Using DSP Chip and Microcontroller (디지털신호처리 칩과 마이크로 컨트롤러를 이용한 자동 조정 양변위 되먹임 제어기의 구현)

  • Kwak, Moon K.;Kim, Ki-Young;Bang, Se-Yoon
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.15 no.8 s.101
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    • pp.954-961
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    • 2005
  • This paper is concerned with the implementation of auto-tuning positive position feedback controller using a digital signal processor and microcontroller. The main advantage of the positive position feedback controller is that it can control a natural mode of interest by tuning the filter frequency of the positive position feedback controller to the natural frequency of the target mode. However, the positive position feedback controller loses its advantage when mistuned. In this paper, the fast fourier transform algorithm is implemented on the microcontroller whereas the positive position feedback controller is implemented on the digital signal processor. After calculating the frequency which affects the vibrations of structure most, the result is transferred to the digital signal processor. The digital signal processor updates the information on the frequency to be controlled so that it can cope with both internal and external changes. The proposed scheme was installed and tested using a beam equipped with piezoceramic sensor and actuator. The experimental results show that the auto-tuning positive position feedback controller proposed in this paper can suppress vibrations even when the target structure undergoes structural change thus validating the approach.

Implementation of Adaptive Positive Popsition Feedback Controller Using DSP chip and Microcontroller (디지털신호처리 칩과 마이크로 컨트롤러를 이용한 적응 양변위 되먹임 제어기의 구현)

  • Kwak, Moon-K.;Kim, Ki-Young;Bang, Se-Yoon
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2005.05a
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    • pp.498-503
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    • 2005
  • This paper is concerned with the implementation of adaptive positive position feedback controller using a digital signal processor and microcontroller The main advantage of the positive position feedback controller is that it can control a natural mode of interest by tuning the filter frequency of the positive position feedback controller to the natural frequency of the target mode. However, the positive position feedback controller loses its advantage when mistuned. In this paper, the fast fourier transform algorithm is implemented on the microcontroller whereas the positive position feedback controller is implemented on the digital signal processor. After calculating the frequency which affects the vibrations of structure most the result is transferred to the digital signal processor. The digital signal processor updates the information on the frequency to be controlled so that it can cope with both internal and external changes. The proposed scheme was installed and tested using a beam equipped with piezoceramic sensor and actuator. The experimental results show that the adaptive positive position feedback controller proposed in this paper can suppress vibrations even when the target structure undergoes structural change thus validating the approach.

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A Study of the Digital Modulation using DSP (DSP를 이용한 디지털 변조에 관한 연구)

  • 최상권;최진웅;김정국
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2001.06a
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    • pp.89-92
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    • 2001
  • In this paper, as a study of programmable software radio digital communication, we implemented ASK(Amplitude Shift Keying), FSK(Frequency Shift Keying), and PSK(Phase Shift Keying) modulation using programmable software(algorithm) of DSP(Digital Signal Processor). Moreover, it is possible to select one of those three modulation methods by realizing on single DSP. We adopted Motorola DSP56002 and Crystal CS4215(A/D and D/A converter) for our purpose. The DSP56002 is 24-bit and operates 20 MIPS at 40 MHz, and the CS4215 is 16-bit and supports the maximum 50 kHz sampling frequency.

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Implementation of a Real Time Watermarking Hardware System for Copyright Protection of a Contents in Digital Broadcasting (디지털 방송에서 콘텐츠의 저작권 보호를 위한 실시간 워터마킹 하드웨어 시스템 구현)

  • Jeong, Yong-Jae;Kim, Jong-Nam;Moon, Kwang-Seok
    • The Journal of the Korea Contents Association
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    • v.9 no.9
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    • pp.51-59
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    • 2009
  • A watermarking for copyright protection of digital contents for broadcasting have to be made for a real-time system. In this paper, we propose a real-time video watermarking system which is hardware-based watermarking system of SD/HD (standard definition/high definition) video with the STRATIX FPGA device from ALTERA. There was little visual artifact due to watermarking in subjective quality evaluation between the original video and the watermarked one in our experiment. Embedded watermark was extracted after robustness testscalled natural video attacks such as A/D (analog/digital) conversion. Our implemented watermarking hardware system can be useful in movie production and broadcasting companies that requires real-time contents protection systems.

Digital Data Communication System for Mobile Network System Using CC1020 Chip (CC1020 Chip을 사용한 모바일 네트워크를 위한 디지털 데이터 통신 시스템)

  • Lim, Hyun-Jin;So, Heung-Kuk
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.1
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    • pp.58-62
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    • 2007
  • Digital communication is important for reliability and mobilization of the multi-channel communication systems. Transmitting and receiving data for the mobilization should be possible in anywhere and in anytime. And this system must be designed light weight small size and low power. One are essential technology for implementing the mobile wireless communication system on the age of ubiquotos. Requirements in constructing such communication field are followings. At first data transmitting and receiving should be carried out by a simple command. Second, the device should be designed as hand-hold type and low power consumption. Third, data communication should be reliable. As one of examples, car to car system which is popular in the market is introduced here, All traffic information in highway is transmitted from one car to another by using this system which can prevent possible traffic accident. This paper shows the design of a digital data communication system with CC1020 chip. This CC1020 makes easy frequency selection and easy switch from the transmit mode to the receive mode by simple setting of a memory register in the chip. The transmit power of this system is designed 10dBm and its communication range is about 100m. The power supplied this system is 3V considered as low power. The sleep mode can be easily entered during transmit mode or receive mode. We shows the program algorithm of CC1020 and interface circuit between MCU and CC1020. We shows the Photo of the CC1020 Module and Atmega128 Module.. We analysed the receiver rate with this system.

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