• Journal of the Institute of Convergence Signal Processing
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• v.8 no.3
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• pp.205-210
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• 2007

This paper presents a CMOS TIQ flash A/D converter which operates very fast compared to other types of A/D converters due to its parallel architecture. The output resolution of designed A/D converter is 6-bit. In order to reduce the power consumption and chip area of conventional flash A/D converter, TIQ based flash A/D converter is proposed, which uses the advantage of the structure of CMOS transistors. The length and width of transistors of TIQ were determined with HSPICE simulation. To speed up the ultra-high speed flash A/D converter, the Fat Tree Encoder technique is used. The TIQ A/D converter was designed with full custom method. The chip's maximum power consumption was 38.45mW at 1.8V, and the operating speed of simulation was 2.7 GSPS.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.2
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• pp.314-321
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• 2003

Recently, many studies about digital watermarking have been doing, and their purpose is to protect copyright of multimedia data. In this paper, the performances of digital watermarkings, in order to hide information of copyright into digital images, are analyzed. The watermarks embedded in subbands on wavelet transform domain are transformed by the processing such as image compression, and the degree of the transformation in each subband depend on its statistical characteristics. That says, we must consider the characteristics of subbands for better watermarking.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.93-98
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• 2002

This paper introduces the design of high-speed analog-to-digital converter (ADC) for hard disk drive (HDD) read channel applications. This circuit is bated on fast regenerative autozero comparator for high speed and low-error rate comparison operation, and Double Speed Dual ADC (DSDA) architecture for efficiently increasing the overall conversion speed of ADC. A new type of thermometer-to-binary decoder appropriate for the autozero architecture is employed for no glitch decoding, simplifying the conventional structure significantly. This ADC is designed for 6-bit resolution, 800 Msample/s maximum conversion rate, 390 mW power dissipation, one clock cycle latency in 0.65 m CMOS technology.

• Proceedings of the Korea Information Processing Society Conference
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• 2013.05a
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• pp.1093-1096
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• 2013

교육과학기술부는 2006년에 학교교육에 새로운 패러다임의 변화를 받아들이는 방법으로 디지털교과서의 사용을 시도하였다. 2007년 이후 일부 초등학교에서 디지털교과서가 시범적으로 운영 되었으며 2015년 초중고등학교 모든 교과서를 디지털 교과서로 변환을 발표하였다. 따라서 본 논문에서는 이에 대처하기 위해 디지털 교과서의 서비스 구성, 구조, 시스템, 플랫폼등에 대해 분석하고 향후 발전 방향을 연구 한다.

• Journal of IKEEE
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• v.8 no.2 s.15
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• pp.166-171
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• 2004

This paper describes a CMOS time to digital converter (TDC) that measures the interval between two signals and converts to a digital signal. There are various methods to measure the time interval. But several architectures have a limitation in resolution and in conversion time. Moreover, they have complex algorithms. But the proposed TDC circuit has achieved a high resolution (25ps) by using a high-speed digital sampler and simple algorithm. The sampler detects when input signals comes into the TDC and output is coded. The proposed multiphase clock generator was also implemented to achieve 25p resolution.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.05b
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• pp.1477-1480
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• 2003

본 논문에서는 실시간 데이터 및 보안데이터, 영상데이터 통을 전송할 때 잡음으로 인해 발생되는 데이터 오류를 효과적으로 복원하기 위해 오류 정정 능력이 뛰어난 터보코드를 적응하여 신뢰성 있는 영상전송 시스템을 실현하였다. 영상처리 시스템에서는 CCTV, 비디오 카메라 등에서 나오는 NTSC(National Television System Committee) 영상 신호를 비디오 디코더를 통해 A/D 변환하여 출력하였다. 변환된 디지털 영상정보는 두 개의 영상필드로 출력되며 그중 하나의 필드가 선택되는 알고리즘을 EPLD(Erasable Programmable Logic Device) 로직회로로 구성하여 디지털 영상 데이터를 절반으로 줄이는 시스템을 구현하였다. 터보코드의 부호기, 복호기 시스템에서는 실수연산이 가능한 DSP(Digital Signal Processor)를 사용하여 터보코드를 구현하였으며, 터보코드의 성능을 좌우하는 인터리버부분은 블록 인터리버를 적용하여 설계하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2000.04a
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• pp.234-239
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• 2000

XML을 기반으로 하는 가상문서는 인터넷 상의 정보 공유를 가능하게 하여 새로운 지식을 생성할 수 있도록 한다. 본 논문에서는 가상문서를 지원하는 디지털도서관 시스템에서 XML로 표현된 가상문서를 효과적으로 처리하도록 하는 문서처리기를 설계 구현하였다. 클라이언트의 요청에 따라 문서 처리 시스템은 가상문서를 클라이언트 브라우저에서 볼 수 있는 형태로 변환하여 전달한다. 그러므로 가장 중요한 기능은 내포링크, 참조링크, 총칭링크 등 다양한 의미의 링크들을 포함하는 가상문서를, 변환을 통하여 클라이언트에게 정확하게 전달하는 것이다. 부가적인 기능으로 우리의 디지털도서관 시스템의 다른 구성 요소인 저장 서버, 검색 서버, 링크 서버, 이름 서비스 등을 지원한다.

• Tunnel and Underground Space
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• v.10 no.3
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• pp.486-491
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• 2000

Blasting vibrations velocity had been used to design blasting pattern and predict damage-possibility of structures. As vibration levels are currently required to estimate the damage concerning human-body and livestock, so measured vibration velocities must be transformed into vibration levels. In this study, the digital filter program was developed to transform measured data into vibration levels. Simple harmonic vibrations and measured data obtain by Blastmate series (Instantel Inc.) were applied to the digital filter program. As a result, simple harmonic vibrations and measured data were successfully transformed into vibration levels using the developed program. Measured data from any instrument with ASCII output-function will similarly be transformed into level units.

• Proceedings of the Korean Society for Rock Mechanics Conference
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• 2000.09a
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• pp.241-246
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• 2000

Blasting vibrations velocity had been used to design blasting pattern and predict damage-possibility of structures. As vibration levels are currently required to estimate the damage concerning human-body and livestock, so measured vibration velocities must be transformed into vibration levels. In this study, the digital filter program was developed to transform measured data into vibration levels. Simple harmonic vibrations and measured data obtained by Blastmate series (Instantel Inc.) were applied to the digital filter program. As a result, simple harmonic vibrations and measured data were successfully transformed into vibration levels using the developed program. Measured data from any instrument with ASCII output-function will similarly be transformed into level units.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2628-2635
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• 2010

This paper analyzes the detection probability of FMCW (Frequency Modulated Continuous Wave) radar based on Doppler frequency and analog-digital converter bit and designs and implements signal processing part of FMCW radar. For performance evaluation, the FMCW radar system consists of a transmitted part and a received part and uses AWGN channel. The system model is verified through analysis and simulation. Frequency offset occurs in the received part caused by the mismatching between the received signal and the reference signal. In case of Doppler frequency less than about 38KHz, performance degradation of detection does not occur in FMCW radar with 75cm resolution The analog-digital converter needs at least 6 bit in order not to degrade the detection probability. And, we design and implement digital signal processing part based on DDS chip of digital transmitted signal generator for FMCW radar.