• Title/Summary/Keyword: 디지털변조

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A Study on the Design of Digital Frequency Discriminator with 3-Channel Delay Lines (3채널 지연선을 가진 디지털주파수판별기의 설계에 관한 연구)

  • Kim, Seung-Woo;Choi, Jae-In;Chin, Hui-cheol
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.6
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    • pp.44-52
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    • 2017
  • In this paper, we propose a DFD (Digital Frequency Discriminator) design that has better frequency discrimination and a smaller size. Electronic warfare equipment can analyze different types of radar signal such as those based on Frequency, Pulse Width, Time Of Arrival, Pulse Amplitude, Angle Of Arrival and Modulation On Pulse. In order for electronic warfare equipment to analyze radar signals with a narrow pulse width (less than 100ns), they need to have a special receiver structure called IFM (Instantaneous Frequency Measurement). The DFD (Digital Frequency Discriminator) is usually used for the IFM. Because the existing DFDs are composed of separate circuit devices, they are bulky, heavy, and expensive. To remedy these shortcomings, we use a three delay line ($1{\lambda}$, $4{\lambda}$, $16{\lambda}$) in the DFD, instead of the four delay line ($1{\lambda}$, $4{\lambda}$, $16{\lambda}$, $64{\lambda}$) generally used in the existing DFDs, and apply the microwave integrated circuit method. To enhance the frequency discrimination, we detect the pulse amplitude and perform temperature correction. The proposed DFD has a frequency discrimination error of less than 1.5MHz, affording it better performance than imported DFDs.

Performance Evaluation of Joint Blind Equalizer and Carrier Recovery for QAM Signal (QAM 신호를 위한 Blind 등화기 Carrier Recovery 결합에 관한 성능평가)

  • 송재철;최형진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.11
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    • pp.2067-2080
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    • 1994
  • Recently, joint blind equalization and carrier recovery for digital mobile transmission system is of growing interest. In this paper, we describe new receiver structure of joint godard blind equalizer and various recovery loop for QAM modulated signal. After a brief review of Godard blind equalizer and MAP estimation Costas loop, Generalized Costas loop, Leclert loop, Angular form loop, we present two kinds of receiver structures for joint blind equalization and carrier recovery. Using a Monto Carlo simulation technique, we can confirm that two kinds of receiver structures operate very well in the steady state.

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A Clipping-free Multi-bit $\Sigma\Delta$ Modulator with Digital-controlled Analog Integrators (디지털 제어 적분형의 차단 현상이 없는 A/D 다중 비트 $\Sigma\Delta$ 변조기)

  • 이동연;김원찬
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.4
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    • pp.26-35
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    • 1997
  • This paper proposes a multi-bit $\Sigma\Delta$ modulator arcitecture which eliminates signal clipping problem. To avoid signal clipping, the output values of intgrators are monitored and modified by a reference value. This oepration is recorded as a digital code to restore actual signal value. Due to the digital code, the substraction of feedback value from the multi-bit quantizer can be calculated by a digital adder and this simplifies dAC operation making the accurate DAC of conventional multi-bit $\Sigma\Delta$ modulator scheme unnecessary. These features make N-th modulator can be implemented by sharing an integrator among N stages to decrease the required chip area. As an experimental example, a 4th order .sum..DELTA. modulator with oversampling ratio of 64 was simulated to show over 130 DB SNR at rail-to-rail input sinusoidal signal.

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Experimental Characteristics of the Electro-Pneumatic Proportional Modulator (비례 모듈레이터 특성)

  • Yun S.;Choi B.O.;Kim C.Y.;Park P.W.;Lee G.W.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.1784-1787
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    • 2005
  • In this paper, proportional modulator which controls the second pressure of the pneumatic system was studied and proportional operating of modulator was gotten by two digital valves that have a fast dynamic characteristics and were controlled by PWM operating method. In order to more precision pressure control, this modulator consist of not only high speed two digital valves but also pressure sensor, measurement equipment and controller having a microprocessing function. In this study, for the development of the new proportional modulator, various research such as PWM control method, test equipment manufacturing, testing and evaluation were accomplished.

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Image Watermarking using Wavelet Function (웨이블릿 함수를 이용한 이미지 워터마킹)

  • Hwang, Suen Ki;Kim, Tae-Woo;Cha, Seung Ju
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.1 no.1
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    • pp.29-34
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    • 2008
  • A wavelet-based image watermarking scheme is proposed, based on the insertion of pseudo-random codes in the frequency domain. The original image is required for the watermark detection. The "strength" of the signature to be embedded depends on the image to be marked, thus fitting signal capacity. The experimental results prove that the method is more tamper resistant and less perceptible for any type of images than other well-known private methods in the frequency domains.

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Performance Evaluation of Error Correcting Code through DVB-C2 Channel Encode/Decode Simulator (DVB-C2 채널 부복호 시뮬레이터를 통한 오류정정 부호 성능 검증)

  • Jung, Joon-Young;Choi, Dong-Joon;Hur, Namho
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2011.07a
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    • pp.272-274
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    • 2011
  • 최근 들어 케이블 방송망을 기반으로 한 디지털 방송, VoIP(Voice over Internet Protocol), VOD(Video on Demand), 영상전화, 이동전화, 무선 랜 로밍 등의 다양한 멀티미디어 서비스의 출현과 향후 도입될 새로운 융합형 멀티미디어 서비스의 수용을 위해 케이블 망의 고도화에 대한 요구가 제기되었다. 특히 유럽을 중심으로 이러한 요구를 만족시키기 위해 DVB(Digital Video Broadcasting)-C2 규격의 개발이 진행되었다. DVB-C2 규격에서는 기존의 게이블 전송 규격인 DVB-C에 대해 30% 이상의 전송 효율을 높이고자 새로운 변조 방식과 채널 오류정정 부호 방식을 도입하였다. 이에 본 논문은 본 논문에서는 DVB-C2 규격에서 도입된 채널 오류정정 부호인 BCH(Bose, Chaudhuri, and Hocquenghem) 부호와 LDPC(Low Density Parity Check) 부호의 연접 방식에 대한 성능을 검증하고자 한다. 이를 위해 개발된 시뮬레이터의 소개와 이를 통한 시험결과를 제시한다.

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A Study on the Receiving Performance Improvement of Digital Mobile Communication (디지털 이동통신의 수신성능개선에 관한 연구)

  • 주재한
    • Journal of the Korea Computer Industry Society
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    • v.2 no.11
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    • pp.1477-1482
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    • 2001
  • In this paper, we examined receiving parameters of receiver and also analyzed them through simulation based on J-STD-018, which is the minimum specification of PCS mobile station. Receiving system was made a passive double balance mixer which has low gain and high IIP3, and an intermediate frequency amplifier for enhancing the low gain. The result of simulating receiving parameter is as follows: noise figure which is the parameter of specification of the receiving sensitivity is 6.746dB, IIP3 which is the parameter of specification of the intermodulation spurious response attenuation is -11.358dBm.

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A Study on Design and Performance Evaluation of the BCPFSK Modem Using the DDS (DDS를 이용한 BCPFSK모뎀 설계 및 성능 평가에 관한 연구)

  • 김경복;최정수;조형래
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.10a
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    • pp.166-171
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    • 2000
  • In modem wireless communication it has been regarded as a important problem for the spectrum efficiency to utilize the limited frequency-resource efficiently. In addition, the system architecture has bun designed for low cost, low power consumption and ultra-lightweight. In this paper, we directly modulated the BCPFSK with a superior spectrum efficiency using the DDS and applied the direct conversion to the system architecture. Finally, we designed a transceiver which has the 433 MHz BCPFSK output and evaluated the system performance.

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A Study on the Variable-Rate RS Encoder Design for the Implement of Next Generation Gbps-Class Cable Transmission System (차세대 기가급 케이블 전송 시스템 구현을 위한 Variable-Rate RS Encoder 설계에 관한 연구)

  • Lee, Yang-Sun;Ju, Won-Ki;Kang, Do-Wook;Cho, Sung-Eon;Kang, Heau-Jo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.06a
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    • pp.638-642
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    • 2007
  • 본 논문에서는 방송/통신 융합을 위한 차세대 기가급 케이블 전송 시스템으로서 디지털방송의 화두가 되고 있는 DOCSIS 3.0 고속데이터전송 시스템의 기술 및 동향에 관하여 분석하고 상향변조 기가급 케이블 전송 시스템 구현을 위해 가변 부호율을 제공하는 RS 인코더를 설계하였다. 본 논문에서 구현한 RS 인코더는 VHDL을 이용하여 설계하였고 ModelSim Tool을 이용한 시뮬레이션 분석을 통하여 동작을 검증하였다.

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