• Title/Summary/Keyword: 듀얼 코어 시스템

Search Result 17, Processing Time 0.023 seconds

Implementation of real-time FD-OCT system based on asynchronous triple buffering and parallel processing using GPU (GPU 병렬처리와 비동기 트리플 버퍼를 적용한 실시간 FD-OCT 시스템 구현)

  • Jeon, Jun-Young;Kim, Young-Bong
    • Proceedings of the Korea Information Processing Society Conference
    • /
    • 2014.04a
    • /
    • pp.858-860
    • /
    • 2014
  • 최근 영상처리 기법과 하드웨어의 발달로 의학 분야에서는 질병의 진단에 다양한 영상 시스템을 활용하고 있다. 특히 OCT 기술은 인체조직의 고해상도 이미지 획득과 혈류속도 측정을 동시에 할 수 있어 의료분야에 다양하게 적용이 가능하여 많은 관심을 받고 있다. 이에 더욱더 선명한 OCT 영상을 획득하기 위해 다양한 알고리즘과 필터를 사용함에 따라 빠른 프로세스 처리가 요구되고 있는 실정이다. 본 논문에서는 듀얼 코어 이상급의 CPU 를 탑재한 시스템에서 데이터 처리 모듈과 렌더링 모듈을 트리플 버퍼를 통해 비동기식으로 멀티스레드화 하였고, GPU 기반의 병렬처리를 통한 데이터 처리를 하여 속도를 향상시켰다. 이에 광학 카메라 촬영 시 선명한 실시간 OCT 영상을 확인할 수 있었다.

Implementation of the Shared Memory in the Dual Core System (Dual Core 시스템에서 Shared Memory 기능 구현)

  • Jang, Seung-Ju
    • The Journal of the Korea Contents Association
    • /
    • v.8 no.9
    • /
    • pp.27-33
    • /
    • 2008
  • This paper designs Shared Memory on the Dual Core system so that it operates a general System V IPC on the Linux O.S. Shared Memory is the technique that many processes can access to identical memory area. We treat Shared Memory which is SVR in a kernel step. We design a share memory facility of Linux operating system on the Dual Core System. In this paper the suggesting of share memory facility design plan in Dual Core system is enhance the performance in existing an unity processor system as a dual core practical use. We attemp a performance enhance in each CPU for each process which uses a share memory.

A Study of Performance Enhancement for the Shared Memory in the Linux O.S (Linux 운영체제에서 Shared Memory 성능 개선 방안 연구)

  • Jang, Seung-Ju;Choi, Eun-Seok;Kang, Dong-Uk;Lee, Gwang-Yong;Kim, Dong-Han;Kim, Jae-Myeong
    • Proceedings of the Korean Information Science Society Conference
    • /
    • 2007.10b
    • /
    • pp.324-329
    • /
    • 2007
  • 본 논문은 대부분의 Linux 운영체제에서 지원해 주는 System V의 IPC 중 하나인 Shared Memo의 성능을 개선하는 방안을 연구한다. Linux에서 사용되는 Shared Memory는 동일한 메모리 영역에 여러 개의 프로세스가 접근할 수 있도록 해 주는 기술이다. 본 논문에서는 Shared Memory의 큰 두 갈래 중 커널 단계에서 처리 되는 SVR 형식의 Shared Memory를 다룬다. 본 논문에서는 리눅스 운영체제의 공유 메모리 성능 개선 방안을 제안한다. 본 논문에서 제안하는 공유 메모리 성능 개선 방안은 듀얼 코어를 활용하여 기존의 단일 처리기 시스템에서보다 성능을 향상시킬 수 있도록 한다. 공유 메모리를 이용한 프로세스의 동작이 별개의 CPU에서 동작되도록 함으로써 성능 향상을 꾀한다.

  • PDF

The Design of the Shared Memory in the Dual Core System (Dual Core 시스템에서 Shared Memory 기능 설계)

  • Jang, Seung-Ju;Lee, Gwang-Yong;Kim, Jae-Myeong
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.12 no.8
    • /
    • pp.1448-1455
    • /
    • 2008
  • This paper designs Shared Memory on the Dual Core system so that it operates a general System V IPC on the Linux O.S. Shared Memory is the technique that many processes can access to identical memory area. We treat Shared Memory in this paper among big two branches of Shared Memory which are SVR in a kernel step format. We design a share memory facility of Linux operating system on the Dual Core System. In this paper the suggesting design plan of share memory facility in Dual Core system is enhancing the performance in existing unity processor system as a dual core practical use. We attempt a performance enhance in each CPU for each process which uses a share memory.

Effects of Permanent Magnet Configuration on the Performance of the BLDC Motor in a Satellite Actuator (위성 구동기용 BLDC Motor 자석 형태 및 배치에 따른 성능)

  • Lee, Jung-Hyung;Lee, Jun Yong;Lee, Hun Jo;Oh, Hwa-Suk
    • Journal of Aerospace System Engineering
    • /
    • v.12 no.2
    • /
    • pp.1-6
    • /
    • 2018
  • The torque ripple that is generated by the irregularity of magnetic flux density on the BLDC motor in a satellite actuator degrades the satellite attitude control performance. In this paper, the performance analysis of permanent magnet configurations (shape, arrangement, and air gap) is simulated by the Finite Element Method (FEM) to find the appropriate combination of the configuration. The configuration is chosen by comparing between rectangular and arc-shaped permanent magnets and single-arrangement and dual-arrangement magnets. The performance is verified by a prototype.

Response Characteristic of the Dual-frame Passive Control System with the Natural Period Difference between the Strength Resistant Core and Frame Structure (강도저항형 코어와 프레임 구조의 진동주기차를 이용한 듀얼프레임 제진시스템의 응답특성)

  • Kim, Tae Kyung;Choi, Kwang Yong;Oh, Sang Hoon;Ryu, Hong Sik
    • Journal of the Earthquake Engineering Society of Korea
    • /
    • v.19 no.6
    • /
    • pp.273-282
    • /
    • 2015
  • In this study, shaking table test has been carried out for the dual frame passive control system for seismic performance verification of the proposed system. The proposed system was separated into two independent frameworks that are strength resistant core and frame structure by connecting to the damper. Moreover, the seismic performance improvement of the proposed system has been verified by comparing and analyzing the experimental results of the proposed system with an existing core system. As a result of the shaking table test, acceleration and displacement responses of dual-frame vibration control system are decreased than those of the existing strength resistant type core system. In the case of the core system, while the damage was concentrated on the column of first floor, the damage of the dual system was dispersed in each layer. The damage also was concentrated on the damper, almost no damage occurs to the structural members. It has been emphasized that installed dampers in the proposed dual system reduce the input energy of whole structure by absorbing seismic input energy, which leads overall system damage to be reduced.

Measuring ultrasonic TOF using Zynq baremetal Multiprocessing (Zynq 기반 baremetal 멀티프로세싱에 의한 초음파 TOF 측정)

  • Kang, Moon ho
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.54 no.6
    • /
    • pp.93-99
    • /
    • 2017
  • In this research the TOF (time of flight) of ultrasonic signal is measured using Xilinx's Zynq SoC (system on chip). The TOF is calculated from the difference between periods during which RF (radio frequency) and ultrasonic signals come across a distance, and then travelling distance is obtained by multiplying the TOF by the ultrasonic speed in the air. For this purpose, a ultrasonic pulse is generated from a Zynq's internal ADC, a FIR (finite impulse response) filter, and a Kalman filter. And a RF reference pulse is generated from a RF interface. Based on baremetal multiprocessing, the Kalman filter and the RF interface are c-programmed on Zynq's dual processor cores, with other components fabricated on Zynq's FPGA. With this HW/SW co-design, both lower resource utilization and much smaller designing period were obtained than the HW design. As a design tool, Vivado IDE(integrated design environment) is used to design the whole signal processing system in hierarchical block diagrams.