• Journal of Advanced Navigation Technology
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• v.20 no.1
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• pp.65-71
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• 2016

Quantum-dot cellular automata (QCA) consists of nano-scale cells and demands very low power consumption so that it is one of the alternative technologies that can overcome the limits of scaling CMOS technologies. Typical BCD-EXCESS 3 code converters using QCA have not considered the scalability so that the architectures are not suitable for a large scale circuit design. Thus, we design a BCD-EXCESS 3 code converter with scalability using QCADesigner and verify the effectiveness by simulation. Our structure have reduced 32 gates and 7% of garbage space rate compare with typical URG BCD-EXCESS 3 code converter. Also, 1 clock is only needed for circuit expansion of our structure though typical QCA BCD-EXCESS 3 code converter demands 7 clocks.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.2
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• pp.208-217
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• 2010

This paper presents a novel 10 GHz bio-radar system based on a frequency multiplier and phase-locked loop(PLL) for non-contact measurement of heartbeat and respiration rates. In this paper, a 2.5 GHz voltage controlled oscillator (VCO) with PLL is employed to as a frequency synthesizer, and 10 GHz continuous wave(CW) signal is generated by using frequency multiplier from 2.5 GHz signal. This paper also presents the noise characteristic of the proposed system. As a result, a better performance and economical frequency synthesizer can be achieved with the proposed bio-radar system. The experimental results shows excellent bio-signal measurement up to 100 cm without any additional digital signal processing(DSP), and the proposed system is validated.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.130-137
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• 2013

This paper presents analog front-end(AFE) circuits for bio-potential measurement. The proposed AFE is composed of IA(instrument amplifier), BPF(band-pass filter), VGA(variable gain amplifier) and SAR(successive approximation register) type ADC. The low gm(LGM) circuits with current division technique and Miller capacitance with high gain amplifier enable IA to implement on-chip AC-coupling without external passive components. Spilt capacitor array with capacitor division technique and asynchronous control make the 12-b ADC with low power consumption and small die area. The total current consumption of proposed AFE is 6.3uA at 1.8V.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.10
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• pp.41-48
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• 2008

This paper proposes a three-phase Z-source dynamic voltage restorer (Z-DVR) to mitigate the voltage sag for the critical loads. The proposed system is composed of passive filter and Z-source topology inverter. As an ESS(Energy Storage System) of the proposed system is employed the Proton Exchange Membrane Fuel Cells (PEMFC). To calculate and control the harmonics and compensation voltage, $i_{d}-i_{q}$ theory in dq rotating reference frame and PI controller are used. In case that three-phase voltage sags occurred, a PSIM simulation was done for the performance comparison of the conventional method employed battery stacks and proposed method. As a result, considering the voltage compensation performance, each method was nearly similar. Also, the compensation performance and the %THD(%Total Harmonic Distortion) result under the various source voltage conditions (sag or swell) were presented and discussed to show the performance of the proposed system.

• Journal of Broadcast Engineering
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• v.25 no.4
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• pp.497-506
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• 2020

A chameleonic surface proposed in this study was a pin-art and 3D display device for generating arbitrary shapes. A smooth and continuous surface was formed using slim telescopic actuators and high-elasticity composite material. Realistic 3D shapes were continuously generated by projecting dynamic mapping images on the surface. A slim telescopic actuator was designed to show long strokes and minimize area for staking. A 3D shape was formed by thrusting and extruding the high-elasticity material using multiple telescopic actuators. This structure was advantageous for generating arbitrary continuous surface, projecting dynamic images and lightening weight. Because of real-time synchronization, a distributed controller based on EtherCAT was applied to operate hundreds of telescopic actuators smoothly. Integrated operating software consecutively generated realistic scenes by coordinating extruded shapes and projecting 3D image from multiple projectors. An opera content was optimized for the chameleon surface and showed to an audience in an actual concert.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.6
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• pp.84-90
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• 1982

In this paper we exploit the use of the intermittent property of speech to reduce the transmission rate or to increase signal-to-quantization noise ratio (SQNR) in coding speech by hybrid companding data modulation (HCDM). In this scheme we detect silence in speech by a speech/silence discriminator. HCDM coding is done only for speech portion. For silence that is detected in evert block of 5 ms, only the information indicating that the Since the HCDM coder transmits bina교 signal synchronously at a fixed rate, the use of a buffer and its efficient control is essential. By using the HCDM with silence detection in coding speech, we could improve SONR by as much as 6 dB over the conventional HCDM or reduce the transmission rate by one third of the HCDM rate.

• Journal of Radiation Protection and Research
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• v.28 no.3
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• pp.255-261
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• 2003

An environmental radiation monitoring system based on high pressurized ionization chamber has been used for on-line gamma monitoring surrounding the KAERI (Korea Atomic Energy Research Institute), which transmits the dose data measured from ion chamber on the site via radio frequency to a central processing computer and stores the transmitted real-time data. Although communication using radio frequency has several advantages such as effective and economical transmission, storage, and data process, there is one main disadvantage that data loss during transmission often happens because of unexpected communication problems. It is possible to restore the loss data by off-line such as floppy disk but the simultaneous process and display of current data as well as the backup data are very difficult in the present on-line system. In this work, a new electronic circuit board and the operation software applicable to the conventional environmental radiation monitoring system are developed and the automatical synchronization of the ion chamber unit and the central processing computer is carried out every day. This system is automatically able to restore the backup data within 34 hours without additional equipments and also display together the current data as well as the transmitted backup data after checking time flag.

• Journal of Navigation and Port Research
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• v.39 no.3
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• pp.253-260
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• 2015

There are many efforts to mechanize the process for underwater port construction due to the severe and adverse working environment. This paper presents an underwater construction robot to level rubbles on the seabed for port construction. The robot is composed of a blade and a multi-functional arm to flatten the rubble mound with respect to the reference level at uneven terrain and to dig and dump the rubbles. This research analyzes the kinematics of the blade and the multi-functional arm including track and swing motions with respect to a world coordinate assigned to a reference depth sensor. This analysis is conducted interfacing with the position and orientation sensors installed at the robot. A hydraulic control system is developed to control a track, a blade and a multi-functional arm for rubble leveling work. The experimental results of rubble leveling work conducted by the robot are presented in land and subsea. The working speed of the robot is eight times faster than that of a human diver, and the working quality is acceptable. The robot is expected to have much higher efficiency in deep water where a human diver is unable to work.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.4C
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• pp.341-348
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• 2009

In this paper, we propose a grouping technique for the SDD(Synchronous Digital Duplexing) based on OFDMA(Orthogonal Frequency Division Multiple Access). The SDD has advantages of increasing data efficiency and flexibility of resource since SDD can transmit uplink signals and downlink signals simultaneously by using mutual time information and mutual channel information, obtained during mutual ranging process. However, the SDD has a disadvantage of requiring additional CS to maintain orthogonality of OFDMA symbols when the sum of mutual time difference and mutual channel length between AP(access point) and SS(subscriber station) or among SSs are larger than CP length. In order to minimize the length of CS for the case of requiring additional CS in SDD, we proposes a grouping technique which controls transmit timing and receive timing of AP and SS in a cell by classifying them into groups. Performances of the proposed grouping technique are evaluated by computer simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.18-24
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• 2012

This paper reports the test results of a 50MHz/s 10 bits DAC developed with $0.18{\mu}m$ CMOS process for the wireless sensor network application. The 10bits DAC, not likely a typical segmented type, has been designed as a current driving type with double step thermometer decoding architecture in which 10bits are divided into 6bits of MSB and 4bits of LSB. MSB 6bits are converted into 3 bits row thermal codes and 3 bits column thermal codes to control high current cells, and LSB 4 bits are also converted into thermal codes to control the lower current cells. The high and the lower current cells use the same cell size while a bias circuit has been designed to make the amount of lower unit current become 1/16 of high unit current. All thermal codes are synchronized with output latches to prevent glitches on the output signals. The test results show that the DAC consumes 4.3mA DC current with 3.3V DC supply for 2.2Vpp output at 50MHz clock. The linearity characteristics of DAC are the maximum SFDR of 62.02dB, maximum DNL of 0.37 LSB, and maximum INL of 0.67 LSB.