• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.117-122
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• 2006

A CMOS LNA based on a single-stage cascode configuration is designed for MB-OFDM ultra-wide band(UWB) systems. Wideband($3.1GHz\~4.9GHz$) input matching is performed using a simple bandpass filter to minimize the chip size and the noise figure degradation. The simulation results using $0.18{\mu}m$ CMOS process parameters show a power gain of 9.7dB, a 3dB band width of $2.1GHz\~7.1GHz$, a minimum NF of 2dB, an IIP3 of -2dBm. better than -11.8dB of input matching while occupying only $0.74mm^2$ of chip area. It consumes 25.8mW from a 1.8V supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.43-51
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• 2013

This paper presents a design and implementation of a low power switched-capacitor 3rd-order delta-sigma modulator for a digital hearing-aid application. The power consumption is reduced by minimizing the output swing of integrators through optimizing the coefficients of modulator architecture and using class-AB output operational amplifiers. The modulator was implemented in a 130nm CMOS technology, and measured to have 79dB of SNR(Signal-to-Noise Ratio) in the signal bandwidth between 100Hz and 10kHz with an oversampling ratio of 160. The power consumption was $60{\mu}W$ from 1.2V power supply and the modulator core occupied $0.53mm{\times}0.53mm$.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.2
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• pp.43-52
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• 2012

This paper presents and analyzes laboratory test results of Interference Cancellation Digital On Channel Regenerative Repeater(IC-DOCR) to broadcast digital television signals in the Advanced Television Systems Committee(ATSC) transmission systems using single frequency networks(SFN). IC-DOCR laboratory test is classified to receiver test, transmitter test, and feedback interference cancellation test. The receiver part includes random noise, single echo, multi-path ensembles, and adjacent channel interference test. The transmitter part includes out-of channel emission, equality of transmitting signal, and phase noise test. By the laboratory test, the receiver part of the IC-DOCR eliminates 28dB of feedback signal higher than the received signal and has 17.8dB at TOV(Threshold Of Visibility) under random noise environment. Also, the transmitter part satisfies the specification of US FCC(Federal Communications Commission) as well as maintains good output signal quality for guaranteeing more than SNR 30dB.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.11-17
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• 2017

In this paper, an 8-direction switched beamforming antenna system at 28GHz frequency band is described for 5th generation wireless communication. This system is composed of an $8{\times}8$ Butler matrix and an 8-element patch array antenna. The antenna system switches beams in 8-direction in the wide range of ${\pm}40^{\circ}$. The antenna spacing is $0.65{\lambda}$ to achieve ${\pm}40^{\circ}$ steering range. Designed results show that the 8-direction beams are placed at ${\pm}6^{\circ}$, ${\pm}17^{\circ}$, ${\pm}28^{\circ}$, ${\pm}40^{\circ}$ offset from the center. Parasitic radiation effect from the large dimension Butler matrix need to be suppressed by employing a stripline structure.

• The Journal of the Acoustical Society of Korea
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• v.21 no.1
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• pp.47-55
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• 2002

This paper proposes a new improved lumped element equivalent circuit analysis method to analyze withdrawal weighted SAW resonators of irregular electrode configurations, which enables to calculate the frequency response of withdrawal weighted SAW resonators. This method has led to the derivation of Smith equivalent circuit's y-parameters for a single ground electrode and formulated the resonator's admittance by calculating the total current into an IDT assembly. To illustrate the effectiveness of the technique, this method was applied to the design of a simple ladder filter and the change of the filter performance was investigated in relation to the weighting of the series and parallel resonators, respectively. The results shows that the withdrawal weighted resonator ladder filters provide better performance in their bandwidth and transition characteristics than normal ones. This new equivalent circuit analysis method can also serve as a better tool to design and analyze general SAW resonator filters.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.5
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• pp.468-474
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• 2010

In this paper, a VCHO(Voltage Controlled Harmonic Oscillator) for K-band application has been designed and implemented. The proposed oscillator has a structure of two hair-pin resonators placed on input and output of active device. Using in/out common frequency tuning structure, the VCHO yields some advantages of the enhanced fundamental frequency suppression characteristic as well as the improved output power of second harmonic. According to implementation and measurement results, it was shown that a VCHO provides an output power of -2.41 dBm, a fundamental frequency suppression of -21.84 dBc, and phase noise of -101.44 dBc/Hz at 100 kHz offset. In addition, as for the bias voltage from 0 V to -10 V for the varactor diode, output frequency range of 10.58 MHz is obtained with a power variation of ${\pm}0.19\;dB$ over its frequency range.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.4
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• pp.1789-1796
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• 2012

In this paper, a new high-efficiency CMOS bridge rectifier for driving RFID tag chips is designed and analyzed. The input stage of the proposed rectifier is designed as a cascade structure connected with two NMOSs for reducing the gate capacitance by circuitry method, which is the main path of the leakage current that is increased when the operating frequency is increased. This gate capacitance reduction technique using the cascade input stage for reducing the gate leakage current is presented theoretically. The output characteristics of the proposed rectifier are derived analytically using its high frequency small-signal equivalent circuit. For the general load resistance of $50K{\Omega}$, the proposed rectifier shows better power conversion efficiencies of 28.9% for 915MHz UHF (for ISO 18000 -6) and 15.3% for 2.45GHz microwave (for ISO 18000-4) than those of 26.3% and 26.8% for 915MHz, and 13.2% and 12.6% for 2.45GHz of compared other two existing rectifiers. Therefore, the proposed rectifier may be used as a general purpose rectifier to drive tag chips for various RFID systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8A
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• pp.814-819
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• 2006

This paper presents the impacts of Ultra Wide-Band(UWB) system applied in Indoor and Handhold communications using frequency band from 3.1 GHz to 10.6 GHz on Wireless Broad-band(WiBro) system based on Orthogonal Frequency Division Multiplexing(OFDM) using frequency of 2.3 GHz. The Minimum Coupling Loss(MCL) method for the case of single interference and Monte Carlo(MC) simulation for multiple interference considering practical scenario were used to evaluate the interference effects of UWB system on WiBro system. As a result, the minimum separation distance between single interferer and the victim receiver required 34.4 m and above to guarantee the co-existence. Also, the UWB transmitting PSD of around - 81 dBm / MHz below should be required to meet the minimum throughput loss of WiBro mobile station in case of multiple UWB interference.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.6
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• pp.1-8
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• 1998

This paper presents an asynchronous DS/CDMA multiuser detector, which is a two stage, symbol-by-symbol scheme consisting of conventional detectors followed by linear decorrelating detectors. The conventional detector first makes temporal decisions and the detected symbols are delayed by one symbol period to be used for the selection of decorrelating bases in the subsequent decorrelaing detection stage. It also employs a bank of early-late correlators in place of a bank of single correlators taking the small offset of chip timing asynchronism into account. The proposed detector requires only the coarse knowledge of relative time delays of interfering users and is suitable for digital implementation. To verify the detector performance, the analytical BER performance will be given and compared with the simulation results for BPSK DS/CDMA signals in AWGN channel. While the performance of the proposed detector will be analyzed for time-limited signal, the simulation is carried out for both the time-limited and band-limited signals. As can be seen in the simulation results, the proposed scheme shows good results.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.49-58
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• 1999

This paper describes an integrated low pass filter fabricated by using $0.8{\mu}m$ single poly CMOS ASIC technology. The filter has been designed for a 5th-order elliptic switched capacitor filter with cutoff frequency of 5khz, 0.1dB passband ripple. The filter consists of MOS swiches poly capacitors and five CMOS op-amps. For the realization of the SC filter, continuous time transfer function H(s) is obtained from LC passive type, and transfered as discrete time transfer H(z) through bilinear-z transform. Another filter has been designed by capacitor scaling for reduced chip area, considering dynamic range of the op-amp. The test results of two fabricated filters are cutoff frequency of 4.96~4.98khz, 35~38dB gain attenuation and 0.72~0.81dB passband ripple with the ${\pm}2.5V$power supply clock of 50KHz.