• Title/Summary/Keyword: 광대역통신

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Simulation and Examination for Beam Profile of DFB Laser (DFB 레이저의 빔 분포 시뮬레이션과 검정)

  • Kwon, Kee-Young;Ki, Jang-Geun
    • Journal of Software Assessment and Valuation
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    • v.15 no.1
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    • pp.71-78
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    • 2019
  • Lasers for optical broadband communication systems should have excellent frequency selectivity and modal stability. DFB lasers have low lasing frequency shift during high speed current modulation. In this paper, we have developed a simulation software and analysed beam profiles of a lasing mode in longitudinal direction of an 1.55um DFB laser with two mirrors and without anti-reflection coatings, that have both an index- and gain-gratings. As the phases of the index and gain gratings on the mirror faces are varied, the beam profiles |R(z)| and |S(z)| of the lasing mode with the emitted power ratio Pl/pr are analysed and examined. In order to reduce the threshold current of a lasing mode and enhance the frequency stability, κL should be greater than 8, regardless of the grating phases on the mirror faces.

Channel Variation Tracking based Effective Preferred BS Selection Scheme of Idle Mode Mobile device for Mobile WiMAX System (Mobile WiMAX시스템에서 채널품질 변동추적을 이용한 유휴모드 이동단말의 효율적인 선호기지국 선택 방안)

  • Lee, Kang-Gyu;Youn, Hee-Yong
    • The KIPS Transactions:PartC
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    • v.17C no.6
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    • pp.471-484
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    • 2010
  • In the wireless communication systems, the power consumption of a mobile device is very important issue due to its battery limitations. Hence most of the standards for wireless networks including a mobile WiMAX system are supporting their own power saving mode in way that a mobile device is able to reduce its energy usage while in the mode. However, those standards just define the arrangement of special time intervals, called a paging listening interval, during which the device needs to receive the paging-related control messages, and they do not specify how to effectively reduce the power in many different network environments. This means the amount of power spent by the device is very dependent on the implementations of individual device-vendors, and undesirable paging loss may happen according to the channel conditions. To reduce unnecessary power usage and the risk of paging loss, this paper proposes the effective frequency/BS selection algorithm applicable to a mobile device operating in the power saving mode, which serves the device with better BS based on the tracking for channel variation. This algorithm consists of the channel estimation phase during each paging listening interval, the tracking phase for the measured results, the frequency reselection phase based on the tracking activity, and the preferred BS reselection phase. Thus the proposed method can improve the paging performance while the device is moving in the network. Also the simulation result shows that the presented scheme is superior to other candidates in energy efficiency due to the channel-adaptive frequency/BS selection.

A 200-MHz@2.5V 0.25-$\mu\textrm{m}$ CMOS Pipelined Adaptive Decision-Feedback Equalizer (200-MHz@2.5-V 0.25-$\mu\textrm{m}$ CMOS 파이프라인 적응 결정귀환 등화기)

  • 안병규;이종남;신경욱
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.05a
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    • pp.465-469
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    • 2000
  • This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer (PADFE) using a 0.25-${\mu}{\textrm}{m}$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stage are inserted into the critical path of the ADFE by using delayed least-mean-square (DLMS) algorithm Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The singl-chip PADFE contains about 205,000 transistors on an area of about 1.96$\times$1.35-$\textrm{mm}^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW.

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A practial design of direct digital frequency synthesizer with multi-ROM configuration (병렬 구조의 직접 디지털 주파수 합성기의 설계)

  • 이종선;김대용;유영갑
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.12
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    • pp.3235-3245
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    • 1996
  • A DDFS(Direct Digital Frequency Synthesizer) used in spread spectrum communication systems must need fast switching speed, high resolution(the step size of the synthesizer), small size and low power. The chip has been designed with four parallel sine look-up table to achieve four times throughput of a single DDFS. To achieve a high processing speed DDFS chip, a 24-bit pipelined CMOS technique has been applied to the phase accumulator design. To reduce the size of the ROM, each sine ROM of the DDFS is stored 0-.pi./2 sine wave data by taking advantage of the fact that only one quadrant of the sine needs to be stored, since the sine the sine has symmetric property. And the 8 bit of phase accumulator's output are used as ROM addresses, and the 2 MSBs control the quadrants to synthesis the sine wave. To compensate the spectrum purity ty phase truncation, the DDFS use a noise shaper that structure like a phase accumlator. The system input clock is divided clock, 1/2*clock, and 1/4*clock. and the system use a low frequency(1/4*clock) except MUX block, so reduce the power consumption. A 107MHz DDFS(Direct Digital Frequency Synthesizer) implemented using 0.8.mu.m CMOS gate array technologies is presented. The synthesizer covers a bandwidth from DC to 26.5MHz in steps of 1.48Hz with a switching speed of 0.5.mu.s and a turing latency of 55 clock cycles. The DDFS synthesizes 10 bit sine waveforms with a spectral purity of -65dBc. Power consumption is 276.5mW at 40MHz and 5V.

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Performance Analysis on The Reactive Repeater Jamming Techniques Against an RCIED Using Mobile Devices (모바일 단말을 이용한 RCIED에 대한 repeater 방식의 반응 재밍 기법 성능 분석)

  • Kim, Yo-Han;Kim, Dong-Gyu;Kim, Hyoung-Nam
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.12
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    • pp.55-63
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    • 2015
  • Recently, terroristic threats using a radio controlled improvised explosive device (RCIED) that is remotely controlled and exploded have been increased around the world. In order to prevent the explosion of an RCIED, jamming techniques that interrupt an RCIED receiver can be used, so that the receiver can not demodulate the trigger code. Conventional jamming technique is a type of active barrage jamming that always emits the noise jamming signal for all the frequency band. However, it needs large power consumption and thus is limited in operation time for a vehicle. In order to overcome the shortage of the active barrage jamming, reactive jamming technique has drawn attention. In reactive jamming, all the frequency band is firstly scanned, and then if any trigger signal exists, one emits the jamming signal to the corresponding frequency band. Therefore, the reactive jamming is superior to the active barrage jamming in terms of power efficiency. However, a reactive jammer emits a jamming signal only after the trigger signal is intercepted, which means that the jamming signal may be late for interrupting an RCIED receiver. In this sense, it is needed to evaluate a delay in an RCIED receiver. To achieve this, we analyze the reaction time and present the simulation result for jamming performance of reactive jamming against an RCIED using mobile devices.

A Study on Fabrication and Performance Evaluation of Wideband 2-Mode HPA for the Satellite Mobile Communications System (이동위성 통신용 광대역 2단 전력제어 HPA의 구현 및 성능평가에 관한 연구)

  • 전중성;김동일;배정철
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.3
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    • pp.517-531
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    • 1999
  • This paper presents the development of the 2-mode variable gain high power amplifier for a transmitter of INMARSAT-M operating at L-band(1626.5-1646.5 MHz). This SSPA(Solid State Power Amplifier) is amplified 42 dBm in high power mode and 36 dBm in low power mode for INMARSAT-M. The allowable error sets +1 dBm of an upper limit and -2 dBm of a lower limit, respectively. To simplify the fabrication process, the whole system is designed by two parts composed of a driving amplifier and a high power amplifier, The HP's MGA-64135 and Motorola's MRF-6401 are used for driving amplifier, and the ERICSSON's PTE-10114 and PTF-10021 are used the high power amplifier. The SSPA was fabricated by the circuits of RF, temperature compensation and 2-mode gain control circuit in aluminum housing. The gain control method was proposed by controlling the voltage for the 2-mode. In addition, It has been experimentally verified that the gain is controlled for single tone signal as well as two tone signals. The realized SSPA has 42 dB and 36 dB for small signal gain within 20 MHz bandwidth, and the VSWR of input and output port is less than 1.5:1 The minimum value of the 1 dB compression point gets 5 dBm for 2-mode variable gain high power amplifier. A typical two tone intermodulation point has 32.5 dBc maximum which is single carrier backed off 3 dB from 1 dB compression point. The maximum output power of 43 dBm was achieved at the 1636.5 MHz. These results reveal a high power of 20 Watt, which was the design target.the design target.

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Design of Double-Dipole Quasi-Yagi Antenna with 7 dBi gain (7 dBi 이득을 가지는 이중 다이폴 준-야기 안테나 설계)

  • Yeo, Junho;Lee, Jong-Ig;Baek, Woon-Seok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.245-252
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    • 2016
  • In this paper, the design of a double-dipole quasi-Yagi antenna (DDQYA) with a gain over 7 dBi at 1.70-2.70 GHz band is studied. The proposed DDQYA consists of two strip dipoles with different lengths and a ground reflector, which are connected trough a coplanar stripline. The length of the second dipole is adjusted to increase the gain in the low frequency band, whereas a rectangular patch director is appended to the DDQYA to enhance the gain in the middle and high frequency band. The effects of the length of the second dipole, and the length and width of the director on the antenna performance are analyzed, and final design parameters to obtain a gain over 7 dBi are obtained. A prototype of the proposed DDQYA is fabricated on an FR4 substrate, and the experimental results show that the antenna has a frequency band of 1.60-2.86 GHz for a VSWR < 2, and measured gain ranges 7.2-7.6 dBi at 1.70-2.70 GHz band.

Batching delivery for VCR-like functions in video-on-demand service system (주문형 비디오 서비스 시스템에서 VCR 기능을 위한 Batching 전송)

  • 박호균;유황빈
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.12
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    • pp.2852-2859
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    • 1997
  • Video-On-Demand system provides electronic video rental services from remote video servers on a broadband communication networks. Most of proposed VOD systems are typically designed for one-to-one conncetion between a user and video server. Therefore, video server stream services to customers individually by allocating a dedicated transmission channel and a set of video server resources for each customer. However, it is inefficiency and wxpensive way when server support multiple users who access the same video stream with a dedicated video channel. Therefore, to achieve cost-effectiveness, batching have studied method that uses multicast communication to simultaneously service all users requesting the same video with a single video with a single video stream. However, the application of the multicast communication by batching detract from the VCR-like function and on-demand nature of the system. In this paepr, we propose a scheme that can support an interactive VCR for all user requesting the same video stream with batching. To reduce a server I/O and network bandwidth requirement, dynamic buffer is allocated to access node which has variable playout poit. Consequently, it makes possible interactive VCR operation as if customer uses true VOD system. Also, this scheme can just deliver a multicast stream without delay after an initial request or VCR action occurred. The policy can guarantee acceptable services to number of users at minimum cost.

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Adaptation of p-Cycle considering QoS Constraints in WDM Networks (WDM 망에서 QoS 제약 조건을 고려한 p-Cycle 적용 방안)

  • Shin, Sang-Heon;Shin, Hae-Joon;Kim, Young-Tak
    • Journal of KIISE:Information Networking
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    • v.30 no.5
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    • pp.668-675
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    • 2003
  • In this paper, we propose an enhanced p-cycle (preconfigured protection cycle) scheme for WDM mesh networks with QoS constraints. In the previous researches on p-cycle, it is assumed that user's connection has a hi-directional connectivity and the same bandwidth on both direction. Therefore it is difficult to apply p-cycle based link protection to uni-directional connections for multicasting or asymmetric broadband multimedia communications with hi-directional connectivity. And it didn't consider QoS of backup path. We enhanced the p-cycles to accomodate uni-directional connections for multicasting or asymmetric bandwidth communications with hi-directional connectivity. And we propose a selection procedure of p-cycle to assure QoS of backup path. We were able to reduce a required backup bandwidth by applying a uni-directional p-cycle concept to asymmetric broadband multimedia communication environment. The proposed p-cycle selection procedure is applied to the U.S. sample network to evaluate whether the configured p-cycles can support QoS constraint of working path and backup path.

Recent Home Networking Services Development and Future Directions: Case analysis of Korean Smart Apartment Complexes (홈네트워킹 서비스 현황 및 발전 방향: 국내 사이버 타운 사례분석)

  • Sawng, Yeong-Wha;Han, Hyun-Soo
    • Information Systems Review
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    • v.6 no.2
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    • pp.269-284
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    • 2004
  • Induced from government policy to boost regional economic competitiveness, regional informatization forming e-community has been the subject included in the various regional informatization master plans in Korea. However, few cases are reported for its successful implementation mainly due to the lack of profitable business model to encourage investment. On the other hand, most efforts to build smart apartments, part of the home networking in a broad sense, has been pursued from the different directions. Telecommunication giant such as Korea Telecom tries to find new source of revenue exploiting enhanced broad band technology. Also, construction companies started constructing housing complexes equipped with built-in high speed network infrastructure as a means to differentiation to other competitors. The contents providing community portal has become mandatory in the sense of bearing the cost from customer side who are willing to adopt those services for new smart house. Our research motivation stems from exploring critical value aspects of realizing the profitability of this emerging new business model, that is, industry convergence model. In this paper, mainly from the survey results of the Korean smart apartment complexes, we reported recent home networking services development in Korea, and value propositions from the business model perspective. Merged business model components of telecommunications, construction, and internet contents are analyzed to provide the insights for future directions.