• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.84-95
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• 2006

In H/W implementation for the finite field the use of normal basis has several advantages, especially, the optimal normal basis is the most efficient to H/W implementation in $GF(2^m)$. In this paper, we propose a new, simpler, parallel multiplier over $GF(2^m)$ having a Gaussian normal basis of type k, which performs multiplication over $GF(2^m)$ in the extension field $GF(2^{mk})$ containing a type-I optimal normal basis. For k=2,4,6 the time and area complexity of the proposed multiplier is the same as tha of the best known Reyhani-Masoleh and Hasan multiplier.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10a
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• pp.148-152
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• 2006

가상공간의 시각적 렌더링에 있어서 카메라의 위치와 방향에 따라서 현재 보여지고 있는 장면의 복잡도가 달라지게 된다. 단순한 장면과 복잡한 장면이 혼합되어있는 경우에 렌더링의 프레임율이 크게 달라지게 되어서 사용자의 가상공간의 항해에 대한 카메라 이동 시에 끊김 현상이 느껴지게 된다. 본 논문에서는 장면이 복잡도에 크게 의존되지 않으면서 지속적으로 안정된 프레임율을 보장할 수 있는 기여도 컬링 기법을 제시한다. 컬링 기술은 복잡한 장면의 빠른 렌더링을 위해 필수적으로 사용되어왔다. 자연스럽고 빠른 렌더링을 위해 본 논문에서는 이미지 공간에서 모든 객체에 대한 바운딩 사각형의 넓이를 빠르게 계산한다. 영상 영역에서의 계산된 넓이가 작은 객체들을 프레임율을 만족시키도록 렌더링 파이프라인에서 제외시킨다. 전체적으로 기여도가 높은 객체들은 최대한 포함시키기 때문에 렌더링의 질을 보장한다. 복잡한 환경에서의 기여도가 작은 많은 객체들을 배제시킴으로써 속도를 향상시킨다. 실제 대도시의 일정 영역에 제안한 기법을 적용하여 본 결과, 복잡한 장면들이 질적인 저하 없이 균일하고 빠른 렌더링을 보장한다는 것을 보여주었다.

• Korean Journal of Cognitive Science
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• v.34 no.1
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• pp.1-20
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• 2023

In this study, we examined the effects of spatial attention in Hangul word recognition depending on visual factors. The visual complexity of words (Experiment 1) and contrast (Experiment 2) were manipulated to examine whether the effect of spatial attention differs depending on visual quality. Participants responded to words with and without codas in experiment 1 and words in high-contrast and low-contrast conditions in experiment 2. The effects of spatial attention were investigated by calculating the difference in performance between the condition where spatial cues were given at the target location (valid trial) and the condition where the spatial cues were not given at the target location (invalid trial) as the cuing effects. As a result, the cuing effects were similar depending on the complexity of the words. It indicates that the effects of spatial attention were not different across the visual complexity conditions. The cuing effects were greater in the low-contrast condition than in the high-contrast condition. The greater effect of spatial attention when the contrast is low was explained as a mechanism of signal enhancement.

• Spatial Information Research
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• v.7 no.2
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• pp.271-282
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• 1999

In this paper, we derived an efficient indexing scheme, SJ tree, which handles multi-attribute data and spatial join operations efficiently. In addition, a number of algorithms for manipulating multi-attribute data are given , together with their computational and I/O complexity . Moreover , we how that SJ tree is a kind of generalized B-tree. This means that SJ-tree can be easily implemented on existing built-in B-tree in most storage managers in the sense that the structure of SJ tree is like that of B-tree. The spatial join operation with spatial output is benchmarked using R-tree, B-tree, K-D-B tree, and SJ tree. Results from the benchmark test indicate that SJ tree out performance other indexing schemes on spatial join with point data.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.07a
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• pp.314-315
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• 2011

MIMO(multi-input multi-output) 시스템은 여러 개의 송 수신기를 이용하여 정보를 전송하여 주파수 대역폭의 확장 없이 채널 용량을 증가시킨다. 그러나 공간 다이버시티를 증가시키는 STBC(space time block code)를 제외한 공간 다중화 방식을 사용하는 LDC(linear dispersion code) 시스템은 변조 레벨이 증가할수록 수신기의 복잡도가 기하급수적으로 높아진다. 본 논문에서는 하이브리드 LDC-MIMO 시스템을 적용하여 낮은 변조 레벨에서도 전송량을 증가시키면서 수신기의 복잡도를 감소시킬 수 있는 시스템을 제안한다. 제안된 알고리듬은 컴퓨터 시뮬레이션을 통하여 검증하였다.

• Annual Conference of KIPS
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• 2011.11a
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• pp.1207-1210
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• 2011

본 논문에서는 PAR-트리라는 공간색인구조를 제안한다. PAR-트리는 object distribution heuristic(객체분할법)으로 absolute crowd index(절대 복잡도)를 사용하여 공간 데이터 객체를 여러 개의 데이터 공간에 균일하게 배치함으로써 질의처리 속도를 향상시킨다. PAR-트리는 MXR-트리에 비해 높은 공간활용도와 빠른 질의 반응시간을 보임으로써 다차원 데이터베이스를 위한 효율적인 색인구조로 사용이 될 것으로 기대된다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.30-36
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• 2016

In this paper, an Rx-ordering aided sphere decoding algorithm for generalized spatial modulation (GSM) systems is proposed. In the proposed sphere decoding algorithm, to efficiently reduce the search region, the received signals are optimally ordered, which results in the reduction of computational complexity. To evaluate the performance and the computational complexity of the proposed Rx-ordered sphere decoding algorithm, the simulations are performed. In the simulation results, it is observed that in GSM systems, the proposed decoding algorithm achieves the same error performance with the conventional SD, whereas it efficiently decreases the computational complexity for symbol detection.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.2
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• pp.3-10
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• 2008

The choice of basis for representation of element in $GF(2^m)$ affects the efficiency of a multiplier. Among them, a multiplier using redundant representation efficiently supports trade-off between the area complexity and the time complexity since it can quickly carry out modular reduction. So time of a previous multiplier using redundant representation is faster than time of multiplier using others basis. But, the weakness of one has a upper space complexity compared to multiplier using others basis. In this paper, we propose a new efficient multiplier with consideration that polynomial exponentiation operations are frequently used in cryptographic hardwares. The proposed multiplier is suitable fer left-to-right exponentiation environment and provides efficiency between time and area complexity. And so, it has both time delay of $T_A+({\lceil}{\log}_2m{\rceil})T_x$ and area complexity of (2m-1)(m+s). As a result, the proposed multiplier reduces $2(ms+s^2)$ compared to the previous multiplier using equally-spaced polynomials in area complexity. In addition, it reduces $T_A+({\lceil}{\log}_2m+s{\rceil})T_x$ to $T_A+({\lceil}{\log}_2m{\rceil})T_x$ in the time complexity.($T_A$:Time delay of one AND gate, $T_x$:Time delay of one XOR gate, m:Degree of equally spaced irreducible polynomial, s:spacing factor)

• Journal of the Korea Institute of Information Security & Cryptology
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• v.33 no.2
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• pp.223-233
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• 2023

Gauss Sieve is an algorithm for solving SVP and requires exponential time and space complexity. The terminationcondition of the Sieve is determined by the size of the constructed list and the number of collisions related to space complexity. The term 'collision' refers to the state in which the sampled vector is reduced to the vector that is already inthe list. if collisions occur more than a certain number of times, the algorithm terminates. When executing previous algorithms, we noticed that unnecessary operations continued even after the shortest vector was found. This means that the existing termination condition is set larger than necessary. In this paper, after identifying the point where unnecessary operations are repeated, optimization is performed on the number of operations required. The tests are conducted by adjusting the threshold of the collision that becomes the termination condition and the distribution in whichthe sample vector is generated. According to the experiments, the operation that occupies the largest proportion decreased by62.6%. The space and time complexity also decreased by 4.3 and 1.6%, respectively.

• Journal of the Korea Society of Computer and Information
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• v.25 no.2
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• pp.41-48
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• 2020

In this paper, we derive a common computational part in an algorithm that can simultaneously perform multiplication and square over finite fields, and propose a low-area bit-parallel systolic array that reduces hardware through sequential processing. The proposed systolic array has less space and area-time (AT) complexity than the existing related arrays. In detail, the proposed systolic array saves about 48% and 44% of Choi-Lee and Kim-Kim's systolic arrays in terms of area complexity, and about 74% and 44% in AT complexity. Therefore, the proposed systolic array is suitable for VLSI implementation and can be applied as a basic component in hardware constrained environment such as IoT.