• Title/Summary/Keyword: 고속 알고리듬

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A Study on Channel Equalization in Channels for Wireless Communication System (무선통신 시스템의 채널 환경에서 채널 등화에 관한 연구)

  • Kim, Dong-Ok
    • Journal of The Institute of Information and Telecommunication Facilities Engineering
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    • v.7 no.1
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    • pp.15-22
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    • 2007
  • The third generation mobile communications system requiring the reliable multimedia data transmission has provided with the reliable voice, data and video services over the variable propagation environment. However the broadband wireless multiple access technologies cause Inter Symbol Interference(ISI) or Multiple Access Interference(MAI) to degrade the performance of CDMA(Code Division Multiple Access) system. Constant Modulus Algorithm which is frequently used as the adaptive blind equalizers to remove the interfering signal has ill-convergence phenomenon without proper initialization. In this paper, new blind equalization method based on conventional CMA is proposed to improve the channel efficiency, and through computer simulation this is tested over the time varying fading environment of mobile communication system. consequently, new blind equalization method into concatenated Kalman filter with CMA is verified better than conventional CMA through adopting minimum mean square errors and eye- pattern obtained from algorithm are compared.

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An Adaptive Decision Feedback Equalizer for Underwater Acoustic Communications (수중음향통신을 위한 적응 결정궤환 등화기)

  • Choi, Young-Chol;Park, Jong-Won;Lim, Yong-Kon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.4
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    • pp.645-651
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    • 2009
  • In this paper, we present bit error rate(BER) performance of an adaptive decision feedback equalizer(DFE) using experimental data. The experiment was performed at the shore of Geoje in November 2007. The BER of the adaptive DFE whose tap weight is updated by RLS is described with change of feedforward filter length, feedback filter length, training sequence length, and delay, which shows that the uncoded average BER is $4{\times}10^2\;and\;1.5{\times}10^{-2}$ with transmission range of 9.7km and 4km, respectively. The BER of the adaptive DFE can be lower than 10-3 by a forward error correction code and therefore the adaptive DFE may be a good candidate for a high speed AUV communications since the volume and weight of the underwater acoustic modem should be small because of the restricted space and power in the battery-operated AUV.

A Fast Pitch Searching Algorithm Using Correlation Characteristics in CELP Vocoder (상관관계 특성을 용한 CELP 보코더의 고속 피치검색 알고리듬)

  • Lee, Joo-Hun;Bae, Myung-Jin;Ann, Sou-Guil
    • The Journal of the Acoustical Society of Korea
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    • v.13 no.2E
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    • pp.20-25
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    • 1994
  • The major drawback to the Code Excited Linear Prediction(CELP) type vocoders is their large computational requirements. In this paper, a simple method is proposed to reduce the pitch searching time in the pitch filter almost without degradation of quality. Bease upon the observational regularity of the correlation function of speech, the searching range can be restricted to the positive side in pitch search. This is done by skipping the negative side with the width which is estimated from the previous positive envelope. In addition to that, the maximum number of available lags can be limited by the threshold, $L_T$, which is set on 58 empirically. So, only the limited numbers of lags are considered in pitch search, which is less than a half of that of the full search method. By using the proposed method in pitch search, its required computations are greatly reduced. Experimental result shows 51% time reduction almost without lowering the speech quality in segmental SNR measure.

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Wavelet-Based Fractal Image Coding Using SAS Method and Multi-Scale Factor (SAS 기법과 다중 스케일 인자를 이용한 웨이브릿 기반 프랙탈 영상압축)

  • Jeong, Tae-Il;Gang, Gyeong-Won;Mun, Gwang-Seok;Gwon, Gi-Yong;Kim, Mun-Su
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.4
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    • pp.335-343
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    • 2001
  • The conventional wavelet-based fractal image coding has the disadvantage that the encoding takes a long time, since each range block finds the best domain in the image. In this Paper, we propose wavelet-based fractal image coding using SAS(Self Affine System) method and multi-scale factor. It consists of the range and domain blocks in DWT(discrete wavelet transform) region. Using SAS method, the proposed method is that the searching process of the domain block is not required, and the range block selects the domain which is relatively located the same position in the upper level. The proposed method can perform a fast encoding by reducing the computational complexity in the encoding process. In order to improve the disadvantage of SAS method which is reduced image qualify, the proposed method is improved image qualify using the different scale factors for each level. As a result, there is not influence on an image quality, the proposed method is enhanced the encoding time and compression ratio, and it is able to the progressive transmission.

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An Implementation of OFDM System Receiver Using Efficient Frequency Offset Estimation Algorithm (효율적인 주파수 옵셋 추정 알고리듬을 이용한 OFDM 시스템 수신기 구현)

  • 박광호;신경욱;전흥우
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.369-372
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    • 2003
  • This paper describes a design of OFDM (Orthogoanl Frequency Division Multiplexing) based wireless LAN system receiver, defined in IEEE 802.11a standards. Because OFDM system uses several orthogonal sequence sets, it ran avoid selective fading of fast data transfer problem when it is used with error correction code. But if the receiver is not synchronized, the orthogonal of between sub-ralliers will be destroyed and the data interruption will be generated. So it makes error property get worse very murk. For improving the noise error, we use the relationship of phasor between sub-carriers and make system synchronization using one tab equalizer. The designed OFDM block is described by Verilog HDL for the efficient and small size hardware. And we preform the functional verification and evaluation using the vector of standards.

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High Speed Implementation of LEA on ARMv8 (ARMv8 상에서 LEA 암호화 고속 구현)

  • Seo, Hwa-jeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.10
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    • pp.1929-1934
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    • 2017
  • Lightweight block cipher (Lightweight Encryption Algorithm, LEA), is the most promising block cipher algorithm due to its efficient implementation feature and high security level. The LEA block cipher is widely used in real-field applications and there are many efforts to enhance the performance of LEA in terms of execution timing to achieve the high availability under any circumstances. In this paper, we enhance the performance of LEA block cipher, particularly on ARMv8 processors. The LEA implementation is optimized by using new SIMD instructions namely NEON engine and 24 LEA encryption operations are simultaneously performed in parallel way. In order to reduce the number of memory access, we utilized the all NEON registers to retain the intermediate results. Finally, we evaluated the performance of the LEA implementation, and the proposed implementations on Apple A7 and Apple A9 achieved the 2.4 cycles/byte and 2.2 cycles/byte, respectively.

A Novel Equalization Method of Multiple Transceivers of Multiple Input Multiple Output Antenna for Beam-farming and the Estimation of Direction of Arrival (빔조향 및 전파도래각 추정을 위한 새로운 다중입력 다중출력 안테나 송수신부 구성방법)

  • 이성종;이종환;염경환;윤찬의
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.3
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    • pp.288-300
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    • 2002
  • In this paper, a novel method of equalization of RF transceivers is suggested for MIMO(Multiple Input Multiple Output) antenna actively studied for high speed data transmission in the recent IMT-2000 system. The core of suggestion is in equalizing the transfer characteristics of multiple transceivers using feedback and memory during the predefined calibration time. This makes it possible to weight the signals in the intermediate frequency, which is easier in the application of recently developed DoA(Direction of Arrival) algorithms. In addition, the time varying optimum cell formation according to traffic is feasible by antenna beam-forming based on the DoA information. The suggested method of equalizing multiple transceivers are successfully verified using envelope simulation. two outputs. This paper is concerned with the diagnosis of multiple crosstalk-faults in OSM. As the network size becomes larger in these days, the convent.nal diagnosis methods based on tests and simulation be.me inefficient, or even more impractical. We propose a simple and easily implementable alg?ithm for detection and isolation of the multiple crosstalk-faults in OSM. Specifically, we develop an algorithm for isolation of the source fault in switc.ng elements whenever the multiple crosstalk-faults are.etected in OSM. The proposed algorithm is illustrated by an example of 16$\times$16 OSM.

High Speed Implementation of LEA on ARM Cortex-M3 processor (ARM Cortex-M3 프로세서 상에서의 LEA 암호화 고속 구현)

  • Seo, Hwa-jeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.8
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    • pp.1133-1138
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    • 2018
  • Lightweight Encryption Algorithm (LEA) is one of the most promising lightweight block cipher algorithm due to its high efficiency and security level. There are many works on the efficient LEA implementation. However, many works missed the secure application services where the IoT platforms perform secure communications between heterogeneous IoT platforms. In order to establish the secure communication channel between them, the encryption should be performed in the on-the-fly method. In this paper, we present the LEA implementation performing the on-the-fly method over the ARM Cortex-M3 processors. The general purpose registers are fully utilized to retain the required variables for the key scheduling and encryption operations and the rotation operation is optimized away by using the barrel-shifter technique. Since the on-the-fly method does not store the round keys, the RAM requirements are minimized. The implementation is evaluated over the ARM Cortex-M3 processor and it only requires 34 cycles/byte.

Differential CORDIC-based High-speed Phase Calculator for 3D Depth Image Extraction from TOF Sensor (TOF 센서용 3차원 깊이 영상 추출을 위한 차동 CORDIC 기반 고속 위상 연산기)

  • Koo, Jung-Youn;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.3
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    • pp.643-650
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    • 2014
  • A hardware implementation of phase calculator for extracting 3D depth image from TOF(Time-Of-Flight) sensor is described. The designed phase calculator adopts redundant binary number systems and a pipelined architecture to improve throughput and speed. It performs arctangent operation using vectoring mode of DCORDIC(Differential COordinate Rotation DIgital Computer) algorithm. Fixed-point MATLAB simulations are carried out to determine the optimal bit-widths and number of iteration. The phase calculator has ben verified by FPGA-in-the-loop verification using MATLAB/Simulink. A test chip has been fabricated using a TSMC $0.18-{\mu}m$ CMOS process, and test results show that the chip functions correctly. It has 82,000 gates and the estimated throughput is 400 MS/s at 400Mhz@1.8V.

A Study on the Design of FFT Processor for UWB Ultrafast Wireless Communication Systems (UWB 초고속 무선통신 시스템을 위한 FFT 프로세서 설계에 관한 연구)

  • Lee, Sang-Il;Chun, Young-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.12
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    • pp.2140-2145
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    • 2008
  • We design and synthesize a 128-point FFT processor for multi-band OFDM, which can be applied to a UWB transceiver. The structure of a 128-point FFT processor is based on a Radix-2 FFT algorithm and a R2SDF pipeline architecture. The algorithm is efficiently modeled in VHDL and the result is simulated using Modelsim. Finally, they are synthesized on Xilinx Vertex-II FPGA, and an operational frequency of 18.7MHz has been obtained. It is expected that the proposed 128-point FFT processor can be applied to an entire FFT block as one of parallel processed FFTs. In order to obtain the enhanced maximum frequency of operation, we design the FFT module consisting of four 128-point FFT processors for parallel process. As a result, we achieve the performance requirement of computing the FFT module in multi-band OFDM symbol timing in 90nm ASIC process.