• 제목/요약/키워드: $TiO_2-Si$ interface

검색결과 86건 처리시간 0.031초

Ti-Si 계면의 얇은 산화막이 TiN/TiS$i_2$ 이중구조막 형성에 미치는 영향 (Effects of the thin SiO$_{2}$ film at the Ti-Si interface on the formation of TiN/TiS$i_2$ bilayer)

  • 이철진;성만영;성영권
    • 대한전기학회논문지
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    • 제45권2호
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    • pp.242-248
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    • 1996
  • The properties of TiN/TiSi$_{2}$ bilayer formed by a rapid thermal annealing is investigated when thin SiO$_{2}$ film exists at the Ti-Si interface. The competitive reaction for the TiN/TiSi_2 bilayer occurs above 600 .deg. C. The thickness of the TiSi$_{2}$ layer decreases with increasing SiO$_{2}$ film thickness and also decreases with increasing anneal temperture When the competitive reaction for the TiN/TiSi$_{2}$ bilayer is occured by rapid thermal annealing, the composition of TiN layer represents TiN$_{x}$O$_{y}$ due to the SiO$_{2}$ layer at the Ti-Si interface but the structures of the TiN and TiSi$_{2}$ layers were not changed.d.d.

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Studies of the $TiO_2-Si$ Interface Bombarded by $Ar^+$ Ion Beam

  • Zhang, J.;Huang, N.K.;Lu, T.C.;Zeng, L.;Din, T.;Chen, Y.K.
    • 한국진공학회지
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    • 제12권S1호
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    • pp.63-66
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    • 2003
  • It is experimentally shown that a $TiO_2$ film on Si(111) substrate was prepared by using the technique of D.C. reaction sputter deposition with $Ar^{+}$ ion beam bombardment, and a layer-like structure was observed from the depth profile of the interface between $TiO_2$ film and Si substrate with Scanning Electron Microscopy and Electron Probe. It was also surprisingly discovered that Ti atoms could be detected at about 9 $\mu$m depth. The $TiO_2$-Si interface bombarded by $Ar^{+}$ ion beams revealed multi-layer structures, a mechanism might be caused by defect diffusion, impurity and matrix relocation. Multi-relocations of impurity and matrix atoms were as a result of profile broadening of the $TiO_2$-Si interface, and the spread due to matrix relocation in this system is shown to exceed much more the spread due to impurity relocation.

급속열처리에 의한 $TiN/TiSi_2$ 이중구조막 혈성에 대한 Ti-Si 계면의 얇은 산화막의 영향 (Effects of the thin $SiO_2$ film on the formation of $TiN/TiSi_2$ bilayer formed by rapid thermal annealing)

  • 이철진;성만영;성영권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 C
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    • pp.1223-1225
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    • 1994
  • The properties of $TiN/TiSi_2$ bilayer formed by a rapid thermal anneal ing is investigated when thin $SiO_2$ film exists at the Ti-Si interface. The competitive reaction for the $TiN/TiSi_2$ bilayer occurs above $600^{\circ}C$. The thickness of the $TiSi_2$ layer decreases with increasing $SiO_2$ film thickness while the TiN layer increases at the competitive reaction. The composition of TiN layer is changed to the $TiN_xO_y$ film due to the thin $SiO_2$ layer at the Ti-Si interface while the structure of the TiN and $TiSi_2$ layers was not changed.

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열처리된 SiO$_{2}$/TiW 구조의 계면 특성 (The interfacial properties of th eanneled SiO$_{2}$/TiW structure)

  • 이재성;박형호;이정희;이용현
    • 전자공학회논문지A
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    • 제33A권3호
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    • pp.117-125
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    • 1996
  • The variation of the interfacial and the electrical properties of SiO$_{2}$TiW layers as a function of anneal temperature was extensively investigated. During the deposition of SiO$_{2}$ on TiW chemical bonds such as SiO$_{2}$, TiW, WO$_{3}$, WO$_{2}$ TiO$_{2}$ Ti$_{2}$O$_{5}$ has been created at the SiO$_{2}$/TiW interface. At the anneal temperature of 300$^{\circ}C$, WO$_{3}$ and TiO$_{2}$ bonds started to break due to the reduction phenomena of W and Ti and simultaneously the metallic W and Ti bonds started to create. Above 500$^{\circ}C$, a part of Si-O bonds was broken and consequently Ti/W silicide was formed. Form the current-voltage characteristics of Al/Sico$_{2}$(220$\AA$)/TiW antifuse structure, it was found that the breakdown voltage of antifuse device wzas decreased with increasing annealing temperature for SiO$_{2}$(220$\AA$)/TiW layer. When r, the insulating property of antifuse device of the deterioration of intermetallic SiO$_{2}$ film, caused by the influw of Ti and W.W.

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$SiO_2$와 Co/Ti 이중층 구조의 상호반응 (Interaction of Co/Ti Bilayer with $SiO_2$ Substrate)

  • 권영재;이종무;배대록;강호규
    • 한국진공학회지
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    • 제7권3호
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    • pp.208-213
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    • 1998
  • 최근 셀리사이드(salicide) 제조시 $COSiO_2$의 에피텍셜 성장을 돕기 위하여 Ti층을 삽 입한 Co/Ti/Si 이중층 구조의 실리사이드화가 관심을 끌고 있다. Co/Ti 이중층을 이용한 salicide 트랜지스터가 성공적으로 만들어지기 위해서는 gate 주위의 spacer oxide위에 증착 된 Co/Ti 이중층을 급속열처리할 때 Co/Ti와 $SiO_2$간의 계면에서의 상호반응에 대하여 조사 하였다. Co/Ti 이중층은 $600^{\circ}C$에서 열처리한 후 면저항이 급격하게 증가하기 시작하였는데, 이것은 Co층이 $SiO_2$와의 계면에너지를 줄이기 위하여 응집되기 때문이다. 이때 Co/Ti의 열 처리후 Ti에 의하여 $SiO_2$기판의 일부가 분해됨으로써 절연체의 Ti산화물이 형성되었으나, 이외의 도전성 반응부산물은 발견되지 않았다.

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차세대 공정에 적용 가능한 Cu(B)/Ti/SiO2/Si 구조 연구 (A Study on Cu(B)/Ti/SiO2/Si Structure for Application to Advanced Manufacturing Process)

  • 이섭;이재갑
    • 한국재료학회지
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    • 제14권4호
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    • pp.246-250
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    • 2004
  • We have investigated the effects of boron added to Cu film on the Cu-Ti reaction and microstructural evolution of Cu(B) alloy film during annealing of Cu(B)/Ti/$SiO_2$/Si structure. The result were compared with those of Cu(B)/$SiO_2$ structure to identify the effects of Ti glue layers on the Boron behavior and the result grain growth of Cu(B) alloy. The vacuum annealing of Cu(B)/Ti/$SiO_2$ multilayer structure allowed the diffusion of B to the Ti surface and forming $TiB_2$ compounds at the interface. The formed $TiB_2$ can act as a excellent diffusion barrier against Cu-Ti interdiffusion up to $800^{\circ}C$. Also, the resistivity was decreased to $2.3\mu$$\Omega$-cm after annealing at $800^{\circ}C$. In addition, the presence of Ti underlayer promoted the growth Cu(l11)-oriented grains and allowed for normal growth of Cu(B) film. This is in contrast with abnormal growth of randomly oriented Cu grains occurring in Cu(B)/$SiO_2$ upon annealing. The Cu(B)/Ti/$SiO_2$ structure can be implemented as an advanced metallization because it exhibits the low resistivity, high thermal stability and excellent diffusion barrier property.

Cu(B)/Ti/SiO2 구조를 열처리할 때 일어나는 미세구조 변화에 미치는 Ti 하지층 영향 (Effects of Ti Underlayer on Microstructure in Cu(B)/Ti/SiO2 Structure upon Annealing)

  • 이재갑
    • 한국재료학회지
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    • 제14권12호
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    • pp.829-834
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    • 2004
  • Annealing of $Cu(B)/Ti/SiO_2$ in vacuum has been carried out to investigate the effects of Ti underlayer on microstructure in $Cu(B)/Ti/SiO_2$ structures. For comparison, $Cu(B)/Ti/SiO_2$ structures was also annealed in vacuum. Three different temperature dependence of Cu growth can be seen in $Cu(B)/Ti/SiO_2$; B precipitates- pinned grain growth, abnormal grain growth, normal grain growth. The Ti underlayer having a strong affinity for B atoms reacts with the out-diffused B to the Ti surface and forms titanium boride at the Cu-Ti interface. The formation of titanium boride acts as a sink for the out-diffusion of B atoms. The depletion of boron in grain boundaries of Cu films, as results of the rapid diffusion of B along the grain boundaries and the insufficient segregation of B to the grain boundaries, induces grain boundaries to migrate and causes the abnormal grain growth. The increased bulk diffusion coefficient of B within Cu grains can be responsible for the normal grain growth occurring in the annealed $Cu(B)/Ti/SiO_2\;at\;600^{\circ}C$. In contrast, the $Cu/SiO_2$ structures show only the abnormal growth of grains and their sizes increasing as the temperature increases above $400^{\circ}C$.

Seed Layer를 통한 PZT 박막의 결정립 크기 조절 (Control of Grain Size of PZT Thin Film through Seed Layers)

  • 김태호;김지영;이인섭
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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    • pp.273-278
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    • 2000
  • In order to study effects of interface layers between PZT films and electrodes for MFM(Metal-Ferroelectric-Metal) structure capacitors, we have fabricated the capacitors with the Pt/PZT/interface-layer/Pt/$TiO_2/SiO_2/Si$ structure. $PT(PbTiO_3)$ interface layers were formed by sol-gel deposition and PbO, $ZrO_2$ and $TiO_2$ thin layers were deposited by reactive sputtering. $TiO_2$ interface layers result in the finest grains of PZT films compared to $PbO_2$ and $ZrO_2$ layers. On the other hand, PT interface layers result in improved morphology of PZT films and do not significantly change ferroelectric properties. It is also observed that seed layers at the middle and top of PZT films do not give significant effects on grain size but the PT seed layer at the interface between the bottom electrode and the PZT films results in the small grain size.

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Electrical Stress in High Permittivity TiO2 Gate Dielectric MOSFETs

  • Kim, Hyeon-Seag;S. A. Campbell;D. C. Gilmer
    • E2M - 전기 전자와 첨단 소재
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    • 제11권10호
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    • pp.94-99
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    • 1998
  • Suitable replacement materials for ultrathin SiO2 in deeply scaled MOSFETs such as lattice polarizable films, which have much higherpermittivities than SiO2, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown, and hot carrier effect measurements were done on 190 layers of TiO2 which were deposited through the metal-organic chemical vapor deposition of titanium tetrakis-isopropoxide (TTIP). Measurements of the high and low frequency capacitance indicate that virtually no interface state are created during constant current injection stress. The increase in leakage upon electrical stress suggests that uncharged, near-interface states may be created in the TiO2 film near the SiO2 interfacial layer that allow a tunneling current component at low bias.

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$SiO_2$기판에 증착된 Ti박막의 산화 및 계면반응 (Oxidation and Interface Reaction for the Ti Film on $SiO_2$ Substrate)

  • 김영남;강성철;박진성;이내인;김일권;김영욱
    • 한국진공학회지
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    • 제2권1호
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    • pp.28-33
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    • 1993
  • 산화분위기에서의 Ti/SiO2 박막의 산화거동 및 계면반응을 조사했다. SiO2막위에 100nm의 티타니움을 스퍼터법으로 형성하여 급속가열로(Rapid Thermal Processor)에서 온도를 달리하여 산화시켰다. 산화거동은 박막의 면저항의 측정, 산화막 두께측정, XPS(X-ray Photoelectron Spectroscopy)에 의한 조성분석으로 평가했다. 산화시 티타니움 면저항은 표면에서 산화로 인해 약 $500^{\circ}C$ 이상에서 증가하기 시작해서 $800^{\circ}C$에서 포화되었다. 이 때 막두께는 약 $700^{\circ}C$ 이상에서 약 2배로 증가한 후 일정한 두께를 나타내었다. 이 결과로부터 산화부산물에 도전성물질이 존재하는 것을 알 수 있었다. TEM과 XPS분석결과 40$0^{\circ}C$ 이상에서 산화시 Ti 표면에서부터 TiO2가 형성되고 $600^{\circ}C$ 이상에서는 TiO2의 형성과 Si의 석출이 확인되었다. 석출되는 Si의 양은 온도에 따라 증가했다.

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