• Electrical & Electronic Materials
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• v.9 no.4
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• pp.336-343
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• 1996

We have studied the preparation and the properties of $Ba_{1-x}$Sr$_{x}$TiO$_{3}$(BST) thin films by using the sol-gel method. Through the comparison of the effects of various solvents and additives in making solutions, we establish the production method of the stable solution which generates the high quality of BST film. We also set up the heat-treatment conditions for depositing the BST thin film through the TGA and XRD analyses. Through the comparison of the surface conditions of BST films deposited on Pt/Ta/SiO$_{2}$/Si and Pt/Ti/SiO$_{2}$/Si substrates, we find that Ta is more efficient diffusion barrier of Si than Ti so that Ta layer prevents the formation of hillocks. We fabricate the planar type capacitor and measure the dielectric properties of the BST thin film deposited on the Pt/Ta/SiO$_{2}$/Si substrate. Dielectric constant and dielectric loss tangent at 1V, 10kHz, and leakage current density at 3V of the BST thin film are 339, 0.052 and 13.3.mu.A/cm$^{2}$, respectively.ely.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.5
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• pp.712-718
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• 1986

A shallow n+ layer of implanted phosphorus was used to lower the barrier height of PtSinSi schottky diodes. The reduction of barrier height of the forward turn-on voltages from 400mV to 180mV of the forward was followed by implantation of phosphorus at 35KeV with an ion dose of 8.0x10**12 atoms/cm\ulcornerand was activated at 925\ulcorner for 30min in dry O2. The test result showed that, as the ion-implanted dose increased, the forward turn-on voltage and reverse breakdown voltage were linearly decreased, but the saturation current and ideality factor(n) were linearly increased.

• Journal of the Korean Vacuum Society
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• v.5 no.4
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• pp.333-340
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• 1996

The properties of TiN as a barrier against Cu diffusion ere studied by sheet resistance measurement, X-ray diffraction, scanning electron microscopy, Auger electron spectroscopy, and capacitance-voltage(C-V) measurement. The sensitivities of the various methods were compared. Specimens with Cu/TiN/Ti/SiO2/Si structure were prepared by various deposition techniques and annealed at various temperatures ranging from $500^{\circ}C$ to $800^{\circ}C$ in 10%H2/90%Ar ambient for hours. As the effectiveness of the barrier property of TiN against Cu diffusion was vanished, the irregular-shaped sports were observed and outdiffused Si were detected on the surface of the Cu thin film. The C-V characteristics of the MOS capacitors varied drastically with annealing temperatures. In C-V measurement, the inversion capacitance decreased at annealing temperature range from $500^{\circ}C$ to $700^{\circ}C$ and increased remarkably at $800^{\circ}C$. These variations may be due to the Cu diffusion through TiN into $SiO_2$ and Si.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.13 no.5
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• pp.254-259
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• 2003

In the fabrication process of transparent conducting thin films of the ATO (antimony-doped tin oxide) on a soda lime glass substrate by a sol-gel dip coating method, the effects of the $SiO_2$ buffer layer formed on the substrate and $N_2$ annealing treatment were investigated by XPS (X-ray photoelectron spectroscopy) analysis. Optical transmittance and electrical resistivity of the 400 nm-thick ATO thin films which were deposited on $SiO_2$ buffer layer/soda lime glass and then annealed under nitrogen atmosphere were 84 % and $5.0\times 10^{-3}\Omega \textrm{cm}$ respectively. The XPS analysis confirmed that a $SiO_2$ buffer layer inhibited Na ion diffusion from the substrate, resulting in prohibiting the formation of a secondary phase such as $Na_2SnO_3$ and SnO and increasing Sb ion concentration and ratio of $Sb^{5+}/Sb^{3+}$ in the film. And it was also found that $N_2$ annealing treatment leads to the reduction of $Sn^{4+}$as well as $Sb^{5+}$ however the reduction of $Sn^{4+}$ is more effective and therefore consequently results in decrease in the electrical resistivity to produce an excellent electrical properties of the film.

• Korean Journal of Materials Research
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• v.11 no.3
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• pp.215-220
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• 2001

Amorphous Ti-Si-N films of approximately 200 and 650 thickness were reactively sputtered on Si wafers using a dc magnetron sputtering system at various $N_2$/Ar flow ratios. Their barrier properties between Cu (750 ) and Si were investigated by using sheet resistance measurements, XRD, SEM, RBS, and AES depth profiling focused on the effect of the nitrogen content in Ti-Si-N thin film on the Ti-Si-N barrier properties. As the nitrogen content increases, first the failure temperature tends to increase up to 46 % and then decrease. Barrier failure seems to occur by the diffusion of Cu into the Si substrate to form Cu$_3$Si, since no other X- ray diffraction intensity peak (for example, that for titanium silicide) than Cu and Cu$_3$Si Peaks appears up to 80$0^{\circ}C$. The optimal composition of Ti-Si-N in this study is $Ti_{29}$Si$_{25}$N$_{46}$. The failure temperatures of the $Ti_{29}$Si$_{25}$N$_{465}$ barrier layers 200 and 650 thick are 650 and $700^{\circ}C$, respectively.ely.

• The Korean Journal of Ceramics
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• v.6 no.3
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• pp.262-266
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• 2000

We investigated the effect of the grain size on the photovoltaic current in (Pb$_{1-x}$La$_x$)TiO$_3$ceramics, and the photoinduced domain switching in (Pb$_{0.85}$La$_{0.15}$)TiO$_3$and BaTiO$_3$ceramics. These behaviors in ferroelectric ceramics were attributed to the grain boundary at which photoexcited electrons were trapped. As the charged grain boundary acted as an electro-potential barrier which impeded the movement of electrons, the photovoltaic current showed a peak at a critical grain size. The space charge field built by the electrons trapped at the grain bound-aries was accounted for the photoinduced domain switching, and AE experimental results support well this account.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.148-148
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• 2010

플래시 메모리로 대표되는 비휘발성 메모리는 IT 기술의 발달에 힘입어 급격한 성장세를 나타내고 있지만, 메모리 소자의 크기가 작아짐에 따라서 그 물리적 한계에 이르러 차세대 메모리에 대한 요구가 점차 높아지고 있는 실정이다. 따라서, 이러한 문제점에 대한 대안으로서 고속 동작 및 정보의 저장 시간을 향상 시킬 수 있는 nano-floating gate memory (NFGM)가 제안되었다. Nano-floating gate에서 사용되는 nanocrystal (NCs) 중에서 Si nanocrystal은 비휘발성 메모리뿐만 아니라 발광 소자 및 태양 전지 등의 매우 다양한 분야에 광범위하게 응용되고 있지만, NCs의 크기와 밀도를 제어하는 것이 가장 중요한 문제로 이를 해결하기 위해서 많은 연구가 진행되고 있다. 또한, 소자의 소형화가 이루어지면서 기존의 플래시 메모리 한계를 극복하기 위해서 터널베리어에 관한 관심이 크게 증가했다. 특히, 최근에 많은 주목을 받고 있는 개량형 터널베리어는 크게 VARIOT (VARIable Oxide Thickness) barrier와 CRESTED barrier의 두 가지 종류가 제안되어 있다. VARIOT의 경우에는 매우 얇은 두께의low-k/high-k/low-k 의 적층구조를 가지며, CRESTED barrier의 경우에는 반대의 적층구조를 가진다. 이와 같은 개량형 터널 베리어는 전계에 대한 터널링 전류의 감도를 증가시켜서 쓰기/지우기 특성을 향상시키며, 물리적인 절연막 두께의 증가로 인해 데이터 보존 시간의 향상을 달성할 수 있다. 본 연구에서는 박막의 $SiO_2$와 $Si_3N_4$를 적층한 VARIOT 타입의 개량형 터널 절연막 위에 전하 축적층으로 $SiN_x$층의 내부에 Si-NCs를 갖는 비휘발성 메모리 소자를 제작하였다. Si-NCs를 갖지 않는 $SiN_x$전하 축적층은 Si-NCs를 갖는 전하 축적층보다 더 작은 메모리 윈도우와 열화된 데이터 보존 특성을 나타내었다. 또한, Si-NCs의 크기가 감소됨에 따라 양자 구속 효과가 증가되어 느린 지우기 속도를 보였으나, 데이터 보존 특성이 크게 향상됨을 알 수 있었다. 그러므로, NFGM의 빠른 쓰기/지우기 속도와 데이터 보존 특성을 동시에 만족하기 위해서는 Si-NCs의 크기 조절이 매우 중요하며, NCs크기의 최적화를 통하여 고집적/고성능의 차세대 비휘발성 메모리에 적용될 수 있을 것이라 판단된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.333-336
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• 1999

The relationship between the DC degradation characteristics of the $ZnO-Bi_2O_3$ varistor and post-annealing is investigated in this study. $ZnO-Bi_2O_3$ varistors containing $SiO_2$ range 0.3 mol% were fabricated by standard ceramic techniques. The post- annealing is performed at $550^{\circ}C$ for 0, 1.5 and 5h. A little phase transition is found according to the analysis of X-ray diffraction. DC degradation tests were conducted at $115\pm3^{\circ}C$ for periods up to 22h. Current-voltage analysis was used to determine nonlinear coefficients($\alpha$). Capacitance-voltage analysis enable the donor density($N_d$) and the barrier height($E_B$) to be determined. From above analysis, it is found that the past-annealing for 5h improved degradation characteristics in $ZnO-Bi_2O_3$ with Si additive.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.36 no.10
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• pp.1049-1054
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• 2012

Continued advancements in organic materials have led to the development of organic devices that are thin, flexible, and lightweight and that can potentially be used as low-cost energy-conversion devices. While these devices have many advantages, the environmentally induced degradation of the active materials and the low-work-function electrodes remain a valid concern. Hence, many vacuum deposition processes have been applied to develop low-permeation barrier coatings. In this work, we present the results pertaining to the developed thin-film encapsulation. Multilayer encapsulation involves the use of $SiO_x$ or $SiN_x$ with parylene. The effective water vapor transmission rates were investigated using a Ca-corrosion test. The integration of the developed barrier layers was demonstrated by encapsulating pentacene/$C_{60}$ solar cells, and the results are presented.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1483-1485
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• 2009

Silicon dioxide ($SiO_2$) thin films were deposited using a modified DBD called a "pin-to-plate-type DBD" in order to generate high-density plasmas with a gas mixture of PDMS/$O_2$. The effect of the gas mixture on the physical and chemical properties of $SiO_2$ deposited by the pin-to-plate-type DBD with the mixture of PDMS/$O_2$ was investigated.