• Journal of the Korean Ceramic Society
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• v.48 no.5
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• pp.335-341
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• 2011

Continuous SiC fiber-reinforced SiC-matrix composites ($SiC_f$/SiC) had been fabricated by electrophoretic infiltration combined with ultrasonication. Nano-sized ${\beta}$-SiC added with 12 wt% of $Al_2O_3-Y_2O_3$ additive and Tyranno$^{TM}$-SA3 fabric were used as a matrix phase and fiber reinforcement, respectively. After hot pressing at 5 different conditions, the density, microstructure and mechanical properties of $SiC_f$/SiC were characterized. Hot pressing at relatively severe conditions, such as $1750^{\circ}C$ for 1 and 2 h, resulted in a brittle fracture behavior due to the strong fiber-matrix interface in spite of their high flexural strength. On the other hand, toughened $SiC_f$/SiC composite could be achieved by hot pressing at milder condition because of the formation of weak interface in spite of the decreased flexural strength. These results proposed the importance of weak fiber-matrix interface in the fabrication of ductile $SiC_f$/SiC composite.

• Transactions of the Korean hydrogen and new energy society
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• v.32 no.6
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• pp.656-662
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• 2021

For the high efficiencies of quantum dot-sensitized solar cells (QDSCs), it is important to control the severe electron recombination at the interface of photoanode/electrolyte. In this work, we optimize the surface passivation process of ZnS/SiO₂ double overlayers for the enhanced photovoltaic performances of QDSCs. The overlayers of zinc sulfide (ZnS) and SiO₂ are coated on the surface of QD-sensitized photoanode by successive ionic layer adsorption and reaction (SILAR) method, and sol-gel reaction, respectively. In particular, for the sol-gel reaction of SiO₂, the influences of temperature of precursor solution are investigated. By application of SiO₂ overlayers on the ZnS-coated photoanode, the conversion efficiency of QDSCs is increased from 5.04% to 7.35%. The impedance analysis reveals that the electron recombination at the interface of photoanode/electrolyte is obviously reduced by the SiO₂ overlayers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.10a
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• pp.14-17
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• 1988

Degradation effects observed in nonvolatile MNOS memory devices with in increasing W/E (Write/Erase) cycling were investigated using n-type MNOS capacitors. The results showed that the density of Si-SiO$_2$ interface states and the conductivity of nitride were increased with W/E cycles, therefore the memory retention characteristics of the MNOS memory devices were degraded. Also, annealing of the degraded devices restored the original Si-SiO$_2$ interface states density, but failed to restore the original nitride conductivity. Based on these experimental results, we found that the degradation of memory retention characteristic was affected by the nitride conductivity rather than by Si-SiO$_2$ interface states.

• Journal of the Korean Ceramic Society
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• v.26 no.3
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• pp.390-394
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• 1989

The stored elastic strain energy due to the thermal expansion mismatch between the thermally oxidized crystalline layer (cristobalite) and CVD Si3N4($\alpha$-Si3N4) on cooling form high oxidation temperature (1000-140$0^{\circ}C$) to room temperature, releases through the crazing of film and lifting at the SiO2/Si3N4 interface. The ratial equation (1/n) which corresponds to the ratio of the relaxation of the stored elastic stain energy due to crazing of film to the total energy, is derived under the assumption of the square crazed pattern, as follow. 1/n={8${\gamma}$(1-v)2}/(ΔL2dE) The ratial equation suggests the reason for the lifting at the SiO2/Si3N4 interface which was observed in this research.

• 전기의세계
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• v.22 no.2
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• pp.11-18
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• 1973

This paper reports some results of Si and SiO$_{2}$ films obtained from the expitaxial growth by hydrogen reduction of SiCI$_{4}$ with a hydrogen and carbon dioxide mixture in an epitaxial-deposition chamber. The deposited Si and SiO$_{2}$ are studied by observing the process parameters affecting the rate of deposition, and the quantitative properties at the interface of Si and SiO$_{2}$ are also considered briefly according to the results of the optical absorption and the voltage-current characteristic of MOS etc. using step etching procedure for oxide films.

• Journal of the Korean institute of surface engineering
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• v.49 no.5
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• pp.467-471
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• 2016

In order to investigate the Na gettering, PSG/$SiO_2$/Al-1%Si multilevel thin films were fabricated. DC magnetron sputter techniques and APCVD (atmosphere pressure chemical vapor deposition) were utilized for the deposition of Al-1%Si thin films and PSG/$SiO_2$ passivations, respectively. Heat treatment was carried out at $300^{\circ}C$ for 5 h in air. SIMS (secondary ion mass spectrometry) depth profiling and XPS (X-ray Photoelectron Spectroscopy) analysis were used to determine the distribution and binding energies of Na, Al, Si, O, P and other elements throughout the PSG/$SiO_2$/Al-1%Si multilevel thin films. Na peaks were mainly observed at the the PSG/$SiO_2$ interface and at the $SiO_2$/Al-1%Si interfaces. Na impurity gettering in PSG/$SiO_2$/Al-1%Si multilevel thin films is considered to be caused by a segregation type of gettering. The chemical state of Si and O elements in PSG passivation appears to be $SiO_2$.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.12
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• pp.1649-1655
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• 1988

Thermally growon SiO2 films were thermally nitrided in a hot-wall furnace and in a RF-heated cold-wall reactor and their characteristics were investigated by the AES and the C-V dmeasurements. The Auger depth profile show that 200\ulcornerSiO2 film nitrided at 1200\ulcorner, for 2hrs by the hot-wall process has a nitrogen-rich layer near the SiOxNy-Si interface. However the nitrogen-ri h layer is not observed in the case of cold-wall process. The maximum flat-band voltage for the SiO2 films nitrided by the hot-wall process is higher than by the cold-wall process, and the peak value of flat-band voltage for the hot-wall process appears the longer nitridation time than that for the cold-wall process. The SiOxNy-Si interface shift toward the Si substrate for the case of the hot-wall process is larger than that for the cold-wall process.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.4
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• pp.625-630
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• 1987

Thermal evaporated SiO rf sputtered SiO2 thin films were most widely used to the gate oxide of TFTs. In this paper, the difference of trap density and distribution between SiO2 and SiO2 film were studied. TFTs using SiO and SiO2 thin film for the gate oxide were fabricated. The output characteirstics of TFTs and the time dpendencd of the leakage current were measured. Models of the carrier transport and carrier trapping in TFT were proposed. The trap density was obtained by substituting measured value for the equation derived from the proposed model. It was found that rf sputtered SiO2 had more traps at interface than thermal evaporated SiO.

• Journal of the Korean Ceramic Society
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• v.36 no.8
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• pp.863-870
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• 1999

SOI(silicon on insulafor) was fabricated through the direct bonding using (100) Si wafer and 4$^{\circ}$off (100) Si wafer to investigate the stacking faults in silicon at the Si/SiO2 oxidized and bonded interface. The treatment time of wafer surface using MSC-1 solution was varied in order to observe the effect of cleaning on bonding characteristics. As the MSC-1 treating time increased surface hydrophilicity was saturated and surface microroughness increased. A comparison of surface hydrophilicity and microroughness with MSC-1 treating time indicates that optimum surface modified condition for time was immersed in MSC-1 for 2 min. The SOI structure directly bonded using (100) Si wafer and 4$^{\circ}$off (100) Si wafer at the room temperature were annealed at 110$0^{\circ}C$ for 30 min. Then the stacking faults at the bonding and oxidation interface were examined after the debonding. The results show that there were anomalies in the gettering of the stacking faults at the bonded region.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.299.2-299.2
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• 2013

We investigated the potassium remaining on a crystalline silicon solar cell after potassium hydroxide (KOH) etching and its effect on the lifetime of the solar cell. KOH etching is generally used to remove the saw damage caused by cutting a Si ingot; it can also be used to etch the rear side of a textured crystalline silicon solar cell before atomic layer-deposited Al2O3 growth. However, the potassium remaining after KOH etching is known to be detrimental to the efficiency of Si solar cells. In this study, we etched a crystalline silicon solar cell in three ways in order to determine the effect of the potassium remnant on the efficiency of Si solar cells. After KOH etching, KOH and tetramethylammonium hydroxide (TMAH) were used to etch the rear side of a crystalline silicon solar cell. To passivate the rear side, an Al2O3 layer was deposited by atomic layer deposition (ALD). After ALD Al2O3 growth on the KOH-etched Si surface, we measured the lifetime of the solar cell by quasi steady-state photoconductance (QSSPC, Sinton WCT-120) to analyze how effectively the Al2O3 layer passivated the interface of the Al2O3 layer and the Si surface. Secondary ion mass spectroscopy (SIMS) was also used to measure how much potassium remained on the surface of the Si wafer and at the interface of the Al2O3 layer and the Si surface after KOH etching and wet cleaning.