• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.388-388
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• 2012

친수성 기판과 소수성 그래핀(graphene) 계면에서의 물의 확산 현상은 호기심을 자극할 뿐만 아니라 그래핀 소자의 특성을 좌우하는 전하도핑(charge doping) 현상을 이해하는데 중요한 모델이 된다. 본 연구에서는 라만 분광법을 이용하여 그래핀/$SiO_2$ 계면에서의 물의 확산 현상을 탐구하였다. 열처리된 그래핀은 기판과의 상호작용에 의해 높은 밀도의 정공(electron hole)으로 도핑되어 있기 때문에, 물이 계면을 통해 확산하게 되면 정공의 밀도를 감소시킬 수 있게 된다. 본 실험에서는 이차원 라만 분광법을 통해 물 속에 담겨진 그래핀의 정공 밀도의 공간적인 분포를 확산 시간에 따라 조사하였다. 물의 확산은 시료에 따라 수 시간에서 수 일의 시간대에 걸쳐 그래핀 가장자리에서 중앙으로 이루어진다는 사실을 확인하였다. 또한 물의 계면확산으로 인해서 전하 밀도가 감소한다는 사실은 열처리된 그래핀의 정공 도핑을 유발하는 산소가 그래핀/$SiO_2$ 계면에 존재한다는 것을 증명한다.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.117-127
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• 1994

In this paper, electrical and reliability properties of N$_2$O oxides, grown at the temperature of 95$0^{\circ}C$ and 100$0^{\circ}C$ to 74$\AA$, and 82$\AA$. respectively, using NS12TO gas in a conventional furnace, have been compared with those of pure oxide grown at the temperature of 850 to 84$\AA$ using O$_2$ gas. Initial IS1gT-VS1gT characteristics of N$_2$O oxides were similar to those of pure oxide, and reliability properties of N$_2$O oxides, such as charge trapping, interface state density and leakage current at low electric field under F-N stress, were improved much better than those of pure oxide. But, with increasing capacitor area. TDDB characteristics of N$_2$O oxides were more degraded than those of pure oxide and this degradation of TDDB characteristics was more severe in 100$0^{\circ}C$ N$_2$Ooxide than in 95$0^{\circ}C$ N$_2$O oxide. The improvement of reliability properties excluding TDDB in N$_2$Ooxides was attributed to the hardness of the interface improved by nitrogen pile-up at the interface of Si/SiO$_2$, but on the other hand, the degradation of TDDB characteristics in N$_2$O oxides was obsered due to the increase of local thinning spots caused by excessive nitrogen at interface during the growth of N$_2$O oxides.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.113-116
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• 2005

In this paper, silicon thin-film solar cells(Si- TFSC) and a-Si/c-Si heterojunction solar cells(HJ-cell) are investigated. The Si-TFSC was prepared on glass substrate by depositing $1-3{\mu}m$ thin-film silicons by glow discharge method. The $a-Si:H/{\mu}c-Si:H$ tandem solar cells on textured ZnO:A1 TCO (transparent conducting oxide) showed improved Jsc in top and bottom cells than that on $SnO_2:F$ TCO. This enhancement of jsc resulted from improved light trapping effect by front textured ZnO:A1. The a-Si/c-Si HJ-cells with simple structure without high efficiency features are suffering from low Voc and Jsc. The improvement of front nip and back interface properties by adopting high quality silicon-films at low temperature should be done both for increasing device performances and production cost.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.78-78
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• 2013

Recently, many platinoid metals like platinum and ruthenium have been used as an electrode of microelectronic devices because of their low resistivity and high work-function. However the material cost of Ru is very expensive and it usually takes long initial nucleation time on SiO2 during chemical deposition. Therefore many researchers have focused on how to enhance the initial growth rate on SiO2 surface. There are two methods to deposit Ru film with atomic layer deposition (ALD); the one is thermal ALD using dilute oxygen gas as a reactant, and the other is plasma enhanced ALD (PEALD) using NH3 plasma as a reactant. Generally, the film roughness of Ru film deposited by PEALD is smoother than that deposited by thermal ALD. However, the plasma is not favorable in the application of high aspect ratio structure. In this study, we used a bis(ethylcyclopentadienyl)ruthenium [Ru(EtCp)2] as a metal organic precursor for both thermal and plasma enhanced ALDs. In order to reduce initial nucleation time, we use several methods such as Ar plasma pre-treatment for PEALD and usage of sacrificial RuO2 under layer for thermal ALD. In case of PEALD, some of surface hydroxyls were removed from SiO2 substrate during the Ar plasma treatment. And relatively high surface nitrogen concentration after first NH3 plasma exposure step in ALD process was observed with in-situ Auger electron spectroscopy (AES). This means that surface amine filled the hydroxyl removed sites by the NH3 plasma. Surface amine played a role as a reduction site but not a nucleation site. Therefore, the precursor reduction was enhanced but the adhesion property was degraded. In case of thermal ALD, a Ru film was deposited from Ru precursors on the surface of RuO2 and the RuO2 film was reduced from RuO2/SiO2 interface to Ru during the deposition. The reduction process was controlled by oxygen partial pressure in ambient. Under high oxygen partial pressure, RuO2 was deposited on RuO2/SiO2, and under medium oxygen partial pressure, RuO2 was partially reduced and oxygen concentration in RuO2 film was decreased. Under low oxygen partial pressure, finally RuO2 was disappeared and about 3% of oxygen was remained. Usually rough surface was observed with longer initial nucleation time. However, the Ru deposited with reduction of RuO2 exhibits smooth surface and was deposited quickly because the sacrificial RuO2 has no initial nucleation time on SiO2 and played a role as a buffer layer between Ru and SiO2.

• Journal of the Korean Vacuum Society
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• v.1 no.1
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• pp.168-175
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• 1992

The surface and interface morphology as well as the sheet resistance, and uniformity of TiSiz film are significantly improved and the lateral titanium silicide growth over the oxide spacer is minimized by the use of ion beam mixing and rapid thermal annealing in nitrogen ambient. In addition, TiSiz film formations on TiISi and TiISiOz system were also studied.

• 전기의세계
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• v.26 no.6
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• pp.86-92
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• 1977

The phenomenon of non-steady-state current flow through the interface traps during the dielectric relaxation of MOS device is presented. Experimental method is also described for determining the energy distribution of interface traps, which is based on isothermal dielectric relaxation current technique. Actually, the energy distribution of interface traps was obtained by measuring the transient current through the traps at Si-SiO$_{2}$ interface only in lower-half of the bandgap. It is shown that the trap energy distributio has peak value 1.72*10$^{13}$ cm$^{-2}$ eV$^{-1}$ near 0.73eV approximately.

• The Journal of Korean Academy of Prosthodontics
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• v.29 no.2
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• pp.245-265
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• 1991

The purpose of this study was to observe the changes of the elemental transmission and bond strength between the metal and porcelain according to various kinds of ion beam mixing method. ion beam mixing of $meta1/SiO_2$ (silica), $meta1/Al_2O_3$(alumina) interfaces causes reactions when the $Ar^+$ was implanted into bilayer thin films using a 100KeV accelerator which was designed and constructed for this study. A vacuum evaporator used in the $10^{-5}-10^{-6}$ Torr vacuum states for the evaporation. For this study, three kinds of porcelain metal selected, -precious, semiprecious, and non-precious. Silica and alumina were deposited to the metal by the vacuum evaporator, separately. One group was treated by two kinds of dose of the ion beam mixing $(1\times10^{16}ions/cm^2,\;5\times10^{15}ions/cm^2)$, and the other group was not mixed, and analyzed the effects of ion beam mixing. The analyses of bond strength, elemental transmissions were performed by the electron spectroscopy of chemical analysis (ESCA), light and scanning electron microscope, scratch test, and micro Vickers hardness tests. The finding led to the following conclusions. 1. In the scanning electron and light microscopic views, ion beam mixed specimens showed the ion beam mixed indentation. 2. In the micro Vickers hardness and scratch tests, ion beam mixed specimens showed higher strength than that of non mixed specimens, however, nonprecious metal showed a little change in the bond strength between mixed and non mixed specimens. 3. In the scratch test, ion beam mixed specimens showed higher shear strength than that of non treated specimens at the precious and semiprecious groups. 4. In the ESCA analysis, Au-O and Au-Si compounds were formed and transmission of the Au peak was found ion beam mixed $SiO_2/Au$ specimen, simultaneously, in the higher and lower bonded areas, and ion beam mixed $SiO_2/Ni-Cr$ specimen, oxygen, that was transmitted from $SiO_2\;to\;SiO_2/Ni-Cr$ interface combined with 12% of Ni at the interface.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.1-7
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• 2000

The SNOSFET memory devices with ultrathin ONO(tunnel oxide-nitride-blocking oxide) gate dielectric were fabricated using n-well CMOS process and investigated its characteristics. The thicknesses of tunnel oxide, nitride and blocking oxide were $23{\AA},\; 53{\AA}\; and\; 33{\AA}$, respectively. Auger analysis shows that the ONO layer is made up of $SiO_2(upper layer of blocking oxide)/O-rich\; SiO_x\N\_y$. It clearly shows that the converting layer with $SiO_x\N\_y(lower layer of blocking oxide)/N-rich SiO_x\N\_y(nitride)/O-rich SiO_x\N\_y(tunnel oxide)$. It clearly shows that the converting layer with $SiO_x\N\_y$ phase exists near the interface between the blocking oxide and nitride. The programming condition of +8 V, 20 ms, -8 V, 50 ms is determined and data retention over 10 years is obtained. Under the condition of 8 V programming, it was confirmed that the modified Fowler-Nordheim tunneling id dominant charge transport mechanism. The programmed threshold voltage is distributed less than 0.1 V so that the reading error of memory stated can be minimized. An $8\times8$ NAND type flash EEPROM with SONOSFET memory cell was designed and simulated with the extracted SPICE parameters. The sufficient read cell current was obtained and the upper limit of $V_{TH}$ for write state was over 2V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.358-361
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• 2002

Self-aligned MOSFETS using a polysilicon gate are widely fabricated in silicon technology. The polysilicon layer acts as a mask for the source and drain implants and does as gate electrode in the final product. However, the usage of polysilicon gate as a self-aligned mask is restricted in fabricating SiC MOSFETS since the following processes such as dopant activation, ohmic contacts are done at the very high temperature to attack the stability of the polysilicon layer. A metal instead of polysilicon can be used as a gate material and even can be used for ohmic contact to source region of SiC MOSFETS, which may reduce the number of the fabrication processes. Co-formation process of metal-source/drain ohmic contact and gate has been examined in the 4H-SiC based vertical power MOSFET At low bias region (<20V), increment of leakage current after RTA was detected. However, the amount of leakage current increment was less than a few tens of ph. The interface trap densities calculated from high-low frequency C-V curves do not show any difference between w/ RTA and w/o RTA. From the C-V characteristic curves, equivalent oxide thickness was calculated. The calculated thickness was 55 and 62nm for w/o RTA and w/ RTA, respectively. During the annealing, oxidation and silicidation of Ni can be occurred. Even though refractory nature of Ni, 950$^{\circ}C$ is high enough to oxidize it. Ni reacts with silicon and oxygen from SiO$_2$ 1ayer and form Ni-silicide and Ni-oxide, respectively. These extra layers result in the change of capacitance of whole oxide layer and the leakage current

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.45-49
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• 2001

We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.