• 제목/요약/키워드: $SiO_2$ coating

검색결과 650건 처리시간 0.026초

화합물 반도체 CdSe 나노구조의 진공 코팅합성과 특성 (Vaccum Coating Synthesis and Characterization of the CdSe Nanostructures as a Semiconductor)

  • 장기석;황창수;박용헌
    • 한국결정학회지
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    • 제15권1호
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    • pp.18-23
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    • 2004
  • CaSe wurtzite 구조를 갖는 박막과 나노구조의 광특성을 조사하기 위하여, 99.99% CdSe 분말(Aldrich)을 $7{\times}10^{-6}$ torr 진공상태에서 $SiO_x$ 기판과 다공성 $AlO_x$ 형판 위에 평균 증착속도 1 ${\AA}$/sec로 증착하였다. 주사 전자현미경 분석법(SEM) 및 박막 X-선 회절분석법과 형광분석법에 의해서 확인한 결과, $AlO_x$ 형판을 주형으로 사용하여 얻은 CdSe 튜브의 직경은 약 200 nm이었고, $SiO_x$ 기판위에 형성된 CdSe 박막의 결정립의 크기는 약 2 nm이었으며 형광특성 실험결과와 일치하였다.

MOD법에 의한 BST 박막의 특성에 대한 연구 (A Study on BST Thin Films by MOD Process)

  • 송재훈
    • 마이크로전자및패키징학회지
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    • 제3권1호
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    • pp.33-40
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    • 1996
  • MOD법에 의해 BST박막을 제조하고 전기적 특성을 측정함으로써 마이크로 회로에 적용가능성을 타진하였다. MOD 공정의 선구물질로서 barium neodecanoate, strontium 2-ethylhexanoate 및 titanium dimethoxy 야-2-ethylheanoate를 합성하였다, 합성된 선구물 질들을 Ba0.5Sr0.5TiO3가 되도록 화학양론적으로 혼합하여 공통용매인 p-xylene에 녹인다음 기판위에 spin coating 방법으로 박막을 형성하여 건조하고 소성하였다. 사용된 기판은 ITO/glass, Pt/SiO2/Si, Pt/Ti/SiO2/Si 및 Pt foil을 사용하였다. 소성 속도를 빨리했을 경우 소성속도를 느리게 했을때에 비하여 훨씬 균일하고 치밀한 박막을 얻을수 있었다, 여러 가 지 제조조건의 변화에 따른 유전상수 I-V 특성 및 C-V 측성 등의 전기적 특성을 측정하고 고찰하였다.

금속유기물증착법에 의한 $La_2Ti_2O_{7}$ 박막의 제조 (Fabrication of $La_2Ti_2O_{7}$ Film by Metalorganic Deposition)

  • 조경호;우동찬;박철우;이희영;남효덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 추계학술대회 논문집
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    • pp.122-125
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    • 1995
  • Using metalorganic deposition technique, $La_2Ti_2O_{7}$ precursor solution was deposited on platinium coated SiO$_2$/SI(100) substrates by spin-coating process. Crystalline and crack-free films of ∼0.2$\mu\textrm{m}$ thickness were successfully fabricated on the above substrate from four different types of $La_2Ti_2O_{7}$ precursor solutions by proper heat treatment in the temperature range of $700^{\circ}C$$1200^{\circ}C$. Microstructure and X-ray diffraction analysis of $La_2Ti_2O_{7}$ thin film showed that the crystallization temperature and the preferred orientation of $La_2Ti_2O_{7}$ thin film were strongly dependent on the precursor used.

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Electrochemical Characteristics of Zn and Si Ion-doped HA Films on Ti-6Al-4V by PEO Treatment

  • Lim, Sang-Gyu;Hwang, In-Jo;Choe, Han-Cheol
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2016년도 추계학술대회 논문집
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    • pp.199-199
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    • 2016
  • Commercially pure titanium (cp-Ti) and Ti alloys (typically Ti-6Al-4V) display excellent corrosion resistance and biocompatibility. Although the chemical composition and topography are considered important, the mechanical properties of the material and the loading conditions in the host have, conventionally. Ti and its alloys are not bioactive. Therefore, they do not chemically bond to the bone, whereas they physically bond with bone tissue. The electrochemical deposition process provides an effective surface for biocompatibility because large surface area can be served to cell proliferation. Electrochemical deposition method is an attractive technique for the deposition of hydroxyapatite (HAp). However, the adhesions of these coatings to the Ti surface needs to be improved for clinical used. Plasma electrolyte oxidation (PEO) enables control in the chemical com position, porous structure, and thickness of the $TiO_2$ layer on Ti surface. In addition, previous studies h ave concluded that the presence of $Ca^{+2}$ and ${PO_4}^{3-}$ ion coating on porous $TiO_2$ surface induced adhesion strength between HAp and Ti surface during electrochemical deposition. Silicon (Si) in particular has been found to be essential for normal bone and cartilage growth and development. Zinc (Zn) plays very important roles in bone formation and immune system regulation, and is also the most abundant trace element in bone. The objective of this work was to study electrochemical characteristcs of Zn and Si coating on Ti-6Al-4V by PEO treatment. The coating process involves two steps: 1) formation of porous $TiO_2$ on Ti-6Al-4V at high potential. A pulsed DC power supply was employed. 2) Electrochemical tests were carried out using potentiodynamic and AC impedance methoeds. The morphology, the chemical composition, and the micro-structure an alysis of the sample were examined using FE-SEM, EDS, and XRD. The enhancements of the HAp forming ability arise from $Si/Zn-TiO_2$ surface, which has formed the reduction of the Si/Zn ions. The promising results successfully demonstrate the immense potential of $Si/Zn-TiO_2$ coatings in dental and biomaterials applications.

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반사방지막(ARC)의 SiO2 구조에 따른 PERC 태양전지 PID 열화 완화 상관관계 연구 (Mitigation of Potential-Induced Degradation (PID) for PERC Solar Cells Using SiO2 Structure of ARC Layer)

  • 오경석;박지원;천성일
    • Current Photovoltaic Research
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    • 제8권4호
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    • pp.114-119
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    • 2020
  • In this study, Mitigation of Potential-induced degradation (PID) for PERC solar cells using SiO2 Structure of ARC layer. The conventional PID test was conducted with a cell-level test based on the IEC-62804 test standard, but a copper PID test device was manufactured to increase the PID detection rate. The accelerated aging test was conducted by maintaining 96 hours with a potential difference of 1000 V at a temperature of 60℃. As a result, the PERC solar cell of SiO2-Free ARC structure decreased 22.11% compared to the initial efficiency, and the PERC solar cell of the Upper-SiO2 ARC structure decreased 30.78% of the initial efficiency and the PID reliability was not good. However, the PERC solar cell with the lower-SiO2 ARC structure reduced only 2.44%, effectively mitigating the degradation of PID. Na+ ions in the cover glass generate PID on the surface of the PERC solar cell. In order to prevent PID, the structure of SiNx and SiO2 thin films of the ARC layer is important. SiO2 thin film must be deposited on bottom of ARC layer and the surface of the PERC solar cell N-type emitter to prevent surface recombination and stacking fault defects of the PERC solar cell and mitigated PID degradation.

용액공정을 이용한 SiOC/SiO2 박막제조

  • 김영희;김수룡;권우택;이정현;유용현;김형순
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2009년도 추계학술발표대회
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    • pp.36.2-36.2
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    • 2009
  • Low dielectric materials have been great attention in the semiconductor industry to develop high performance interlayer dielectrics with low k for Cu interconnect technology. In our study, the dielectric properties of SiOC /SiO2 thin film derived from polyphenylcarbosilane were investigated as a potential interlayer dielectrics for Cu interconnect technology. Polyphenylcarbosilane was synthesized from thermal rearrangement of polymethylphenylsilane around $350^{\circ}C{\sim}430^{\circ}C$. Characterization of synthesized polyphenylcarbosilane was performed with 29Si, 13C, 1H NMR, FT-IR, TG, XRD, GPC and GC analysis. From FT-IR data, the band at 1035 cm-1 is very strong and assigned to CH2 bending vibration in Si-CH2-Si group, indicating the formation of the polyphenylcarbosilane. Number average of molecular weight (Mn) of the polyphenylcarbosilane synthesized at $400^{\circ}C$ for 6hwas 2, 500 and is easily soluble in organic solvent. SiOC/SiO2 thin film was fabricated on ton-type silicon wafer by spin coating using 30wt % polyphenylcarbosilane incyclohexane. Curing of the film was performed in the air up to $400^{\circ}C$ for 2h. The thickness of the film is ranged from $1{\mu}m$ to $1.7{\mu}m$. The dielectric constant was determined from the capacitance data obtained from metal/polyphenylcarbosilane/conductive Si MIM capacitors and show a dielectric constant as low as 2.5 without added porosity. The SiOC /SiO2 thin film derived from polyphenylcarbosilane shows promising application as an interlayer dielectrics for Cu interconnect technology.

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Perspective of industrial application of high pressure and low temperature plasma

  • Kogoma, Masuhiro;Tanaka, Kunihito
    • 한국표면공학회지
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    • 제34권5호
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    • pp.378-383
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    • 2001
  • An out line of the material process with using the atmospheric pressure glow plasma is described as follows : (1) TiO powder coating with SiO$_2$ (2) Surface treatment of Fluorinated polymers and (3) Surface cleaning of electronic circuit board with using splay type.

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광커넥터 패룰 단면의 다층 무반사 코팅 박막 제작 및 특성에 관한 연구 (Study of Multi Anti-Reflection Coating Thin Film of Ferrule Facet Manufacture and Characteristics)

  • 기현철;양명학;김선훈;김상택;박경희;홍경진
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.408-409
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    • 2007
  • Ferrule function have connect Optical Communication Cable. But Ferrule have important role that is decided transmission efficiency and information quality. Key-point of detailed drawing of ferrule is Anti-Reflection. In the study Broadband Anti-Reflection coating Film was design for ferrule of optical connector and deposited in low temperature by Ion-Assisted Deposition system. Optical thin film materials($Ta_2O_5$, $SiO_2$) were manufactured Index and Film thickness. $Ta_2O_5$ index is 2.123 ~ 2.125 and $SiO_2$ is 1.44 ~ 1.442. Reflection Loss of film deposited on Ferrule is 30.1[dB].

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Fabrication of Graphene p-n Junction Field Effect Transistors on Patterned Self-Assembled Monolayers/Substrate

  • Cho, Jumi;Jung, Daesung;Kim, Yooseok;Song, Wooseok;Adhikari, Prashanta Dhoj;An, Ki-Seok;Park, Chong-Yun
    • Applied Science and Convergence Technology
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    • 제24권3호
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    • pp.53-59
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    • 2015
  • The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.

Mg 합금의 PEO 공정 조건에 따른 산화피막 결정상과 내부식성에 대한 연구 II. 내부식성 (Corelation between crystalline phase and corrosion resistance of Mg alloy with different PEO conditions. II. Corrosion resistance)

  • 김배연;김용남;전민석;함재호
    • 한국결정성장학회지
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    • 제28권2호
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    • pp.80-84
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    • 2018
  • AZ31과 AZ91 Mg 합금을 Na-P 및 Na-Si 전해질을 사용하여 전해질의 농도, 인가전압, 처리시간에 따라 여러가지 조건에서 PEO 처리하여 5%의 농도를 갖는 염수분무법으로 내부식성 연구를 하였다. 일반적으로 산화피막 코팅 두께가 증가하면 내부식성이 증가하였다. 코팅두께보다 산화피막 표면의 기공크기가 커지면 장기 내부식성은 나빠지는 경향을 보인다. 산화피막의 전체적인 산화물 결정상이 증가할수록, 또 MgO 결정상 대신 $Mg_2SiO_4$ 상과 같은 다른 결정상이 증가할수록 내부식성이 월등히 증가하는 것을 알 수 있었다.