• JSTS:Journal of Semiconductor Technology and Science
• /
• 제2권1호
• /
• pp.49-55
• /
• 2002

This paper presents high performance MEMS passives using fully CMOS compatible, monolithically integrable 3-D RF MEMS processes for RF and microwave applications. The 3-D RF MEMS technology has been developed and investigated as a viable technological option, which can break the limit of the conventional IC technology. We have demonstrated the versatility of the technology by fabricating various 3-D thick-metal microstructures for RF and microwave applications, such as spiral/solenoid inductors, transformers, and transmission lines, with a vertical dimension of up to $100{\;}\mu\textrm{m}$. To the best of our knowledge, we report that we are the first to construct a fully integrated VCO with MEMS inductors, which has achieved a low phase noise of -124 dBc/Hz at 300 kHz offset from a center frequency of 1 GHz.

• 호남수학학술지
• /
• 제8권1호
• /
• pp.51-74
• /
• 1986

The thery of measure is significant in that we extend from it to the theory of integration. AS specific metric outer measures we can take Hausdorff outer measure and Lebesgue-Stieltjes outer measure connecting measure with monotone functions.([12]) The purpose of this paper is to find some properties of Lebesgue-Stieltjes measure by extending it from $R^1$ to $R^n(n{\geq}1)$ $({\S}3)$ and differentiation of the integral defined by Borel measure $({\S}4)$. If in detail, as follows. We proved that if $_n{\lambda}_{f}^{\ast}$ is Lebesgue-Stieltjes outer measure defined on a finite monotone increasing function $f:R{\rightarrow}R$ with the right continuity, then $$_n{\lambda}_{f}^{\ast}(I)=\prod_{j=1}^{n}(f(b_j)-f(a_j))$$, where $I={(x_1,...,x_n){\mid}a_j$<$x_j{\leq}b_j,\;j=1,...,n}$. (Theorem 3.6). We've reached the conclusion of an extension of Lebesgue Differentiation Theorem in the course of proving that the class of continuous function on $R^n$ with compact support is dense in $L^p(d{\mu})$ ($1{\leq$}p<$\infty$) (Proposition 2.4). That is, if f is locally $\mu$-integrable on $R^n$, then $\lim_{h\to\0}\left(\frac{1}{{\mu}(Q_x(h))}\right)\int_{Qx(h)}f\;d{\mu}=f(x)\;a.e.(\mu)$.

• Korean Journal of Mathematics
• /
• 제25권4호
• /
• pp.483-494
• /
• 2017

In the current manuscript, we investigate the pointwise convergence of the singular integral operators involving power nonlinearity given in the following form: $$T_{\lambda}(f;x)={\int_a^b}{\sum^n_{m=1}}f^m(t)K_{{\lambda},m}(x,t)dt,\;{\lambda}{\in}{\Lambda},\;x{\in}(a,b)$$, where ${\Lambda}$ is an index set consisting of the non-negative real numbers, and $n{\geq}1$ is a finite natural number, at ${\mu}$-generalized Lebesgue points of integrable function $f{\in}L_1(a,b)$. Here, $f^m$ denotes m-th power of the function f and (a, b) stands for arbitrary bounded interval in ${\mathbb{R}}$ or ${\mathbb{R}}$ itself. We also handled the indicated problem under the assumption $f{\in}L_1({\mathbb{R}})$.

• 대한수학회논문집
• /
• 제19권4호
• /
• pp.661-681
• /
• 2004

We research properties of the space of measurable functions square integrable with weight exp$2\nu $\mid$x$\mid$$, and those of the space of Fourier hyperfunctions. Also we show that the several embedding theorems hold true, and that the Fourier-Lapace operator is an isomorphism of the space of strongly decreasing Fourier hyperfunctions onto the space of analytic functions extended to any strip in $C^n$ which are estimated with the aid of a special exponential function exp($\mu$｜x｜).

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 ITC-CSCC -2
• /
• pp.1121-1124
• /
• 2002

In this paper, an IC realization of a cell-network type SC DC-DC converter is reported. To achieve small and low-cost realization, the converter is designed by using a 1.2 $\mu\textrm{m}$ CMOS technology. The CMOS implemented converter will be useful as a building block of various mobile equipments since step-up and step-down voltages can be provided at one time. Concerning the proposed DC-DC converter, SPICE simulatiorls are performed to investigate the characteristics of the circuit. The SPICE simulations show that, the efficiency of the simulated circuit is more than 95 %. From the layout design using a CAD tool, MAGIC, the VLSI chip is fabricated in the chip fabrication program of VLSI Design and Education Center(VDEC), the University of Tokyo with the collaboration by On-Semiconductor. The proposed circuit is integrable by a standard 1.2 $\mu\textrm{m}$ CMOS technology.

• Korean Journal of Mathematics
• /
• 제24권3호
• /
• pp.545-565
• /
• 2016

In this paper, we present some general results on the pointwise convergence of the non-convolution type nonlinear singular integral operators in the following form: $$T_{\lambda}(f;x)={\large\int_{\Omega}}K_{\lambda}(t,x,f(t))dt,\;x{\in}{\Psi},\;{\lambda}{\in}{\Lambda}$$, where ${\Psi}$ = and ${\Omega}$ = stand for arbitrary closed, semi-closed or open bounded intervals in ${\mathbb{R}}$ or these set notations denote $\mathbb{R}$, and ${\Lambda}$ is a set of non-negative numbers, to the function $f{\in}L_{p,{\omega}}({\Omega})$, where $L_{p,{\omega}}({\Omega})$ denotes the space of all measurable functions f for which $\|{\frac{f}{\omega}}\|^p$ (1 ${\leq}$ p < ${\infty}$) is integrable on ${\Omega}$, and ${\omega}:{\mathbb{R}}{\rightarrow}\mathbb{R}^+$ is a weight function satisfying some conditions.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 ITC-CSCC -3
• /
• pp.2000-2003
• /
• 2002

In this paper, an IC chip of a cell- network type circuit constructed with 1-dimensional chaos circuits is reported. The circuit, is designed by sing switched-current (Sl) techniques. In the proposed circuit, by controlling connections of cells, an S- dimensional circuit (S ＝ 1, 2, 3,…) and a synchronization system can be constructed easily. Furthermore, in spite of faults of a few cells, the circuit can reconstruct above-mentioned systems only to change connections of cells. This feature will open up new vista for engineering applications which are used in a distance place such as space, deep sea, etc. since it is difficult to repair faults of these application systems. To investigate the characteristics of the circuit, SPICE simulations are performed. The VLSI chip is fabricated from the layout design using a CAD tool, MAGIC. The proposed circuit is integrable by a standard 1.2 $\mu\textrm{m}$ CMOS technology.