This paper proposed a neural computer architecture for the learning of script character pattern recognition categories. Oriented filter with complex cells preprocess about the input script character, abstracts contour from the character. This contour normalized and inputed to the ART. Top-down attentional and matching mechanisms are critical in self-stabilizing of the code learning process. The architecture embodies a parallel search scheme that updates itself adaptively as the learning process unfolds. After learning ART self-stabilizes, recognition time does not grow as a function of code complexity. Vigilance level shows the similarity between learned patterns and new input patterns. This character recognition system is designed to adaptable. The simulation of this system showed satisfied result in the recognition of the hand written characters.

This paper persents how the signal is expressed by an implied unit data and the implied unit data is regenerated into the original signal. This shows that the regenerated signal is equal or similar to the original signal depending on the number of chaos prediction. The algorithm quoted above is implemented from the signal composed of 30 data. This algorithm will be applied to the applied science of data communication: information storage, speech processing, CAD, character recognition, etc...

Neural network control has many innovative potentials for fast, accurate and intelligent adaptive control. In this paper, two kinds of neurocontrol architectures for the dynamic control of robot manipulators are developed. One is based on a System Identification and Control scheme and the other is based on the Feedback-Error leaming scheme. Both of the proposed architectures use an inverse dynamic neurocontroller in parallel with a linear neurocontroller. The difference is that the first architecture uses the system identifier to get the signals used for training neurocontrollers, while the second architecture uses a properly defined energy function. Compared with the previous types of neurocontrollers which are using an inverse dynamic neurocontroller and a fixed PD gain controller, the proposed architectures not only eliminate the painful process of the fixed gain tuning but also exhibit superior peformances because the linear neurocontroller can adapt its gains according to the applied task. This superior performance is tested and verified through computer simulation of the dynamic control of the PUMA 560 arm.

A process control language is developed using function block configuration, to simplify software development for large scale process control systems, and to implement advanced control algorithms with ease. A function block parser and controller is implemented to be suitable for multi-loop control systems having hierachical structure. On-line change of controller parameter is possible, and inclusion of user defined function block is also possible. By adding plant model block, control performance can be checked in advance. Function blocks of the Smith Predicotor, auto-tuners are implemented to demonstrate usefulness of function block configuration.

We have presented the tracing algorithm for center pixel of character image. Character image was read by scanner device. Performing the tracing process, it can be possible to detect feature points, such as branch point, stroke of 4 directions. So, the tracing process covers the thinning and feature point detection process for improving the processing time. Usage of suggested tracing algorithm instead of thinning that is the preprocessing of character recognition increases speed up to 5 times. The preprocessing chip has been designed by using single layer perceptron algorithm.

In this paper, a matching method is proposed to improve the correct matching rate in stereo correspondence matching in which the fingerprint of zero-crossing points on the scale-space is used as the robust matching feature. The dynamic programming, which is appropriate for the fingerprint feature, is introduced for correspondence matching. We also improve the matching rate by using the post-processing for correcting mismatched points. In simulation, we apply the proposed algorithm to the synthetic and real images and obtain good matching results.

A huge amount of multiplications is required for 2-D filtering on the image data, making it difficult to implement a real-time quincuncial interpolator. In this paper, efficient design technique and VLSI structures for 2-D multipleierless filter are presented. In the filter design, by introducing an efficient scheme for discretizing the frequency response of the prototype filter, it is shown that a significant amount of the computational burden required in the conventional techniques, such as local search, branch and bound techniques, could be saved. In the case of 5$\times$5 filter, it is found that the design technique described in this paper could save about 80% of the computation time, compared to the conventional methods, while providing a comparable performance. For a hardware implementation, two different VLSI structures for 2-D multiplierless filter are also introduced in the paper : One is for block parallel processing and the other for scan-line parallel processing. In both structure, the AP(area-period) figure improves over Wu's structure[4].

This paper proposes a new motion estimation algorithm which takes into account the rate-distortion relation in encoding motion compensated error images. The proposed algorithm is based on a new block-matching criterion which is the function of not only the mean squared block-matching error but also the code length for the entropy coded motion vector. The proposed algorithm optimizes the trade-off between the bit rate for motion compensated error images and the bit rate for the motion vectors. Simulation results show that in the motion compensated image coding the proposed motion estimator improves the overall performance by 0.5 dB when compared to the motion estimator which uses MSE only.