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Efficient hardware implementation and analysis of true random-number generator based on beta source

  • Park, Seongmo (Department of Intelligent SoC Research, Electronics and Telecommunications Research Institute) ;
  • Choi, Byoung Gun (Department of Intelligent SoC Research, Electronics and Telecommunications Research Institute) ;
  • Kang, Taewook (Department of Intelligent SoC Research, Electronics and Telecommunications Research Institute) ;
  • Park, Kyunghwan (Department of Intelligent SoC Research, Electronics and Telecommunications Research Institute) ;
  • Kwon, Youngsu (Department of Intelligent SoC Research, Electronics and Telecommunications Research Institute) ;
  • Kim, Jongbum (Department of Radioisotope Research, Korea Atomic Energy Research Institute)
  • Received : 2020.03.09
  • Accepted : 2020.07.02
  • Published : 2020.08.18
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Abstract

This paper presents an efficient hardware random-number generator based on a beta source. The proposed generator counts the values of "0" and "1" and provides a method to distinguish between pseudo-random and true random numbers by comparing them using simple cumulative operations. The random-number generator produces labeled data indicating whether the count value is a pseudo- or true random number according to its bit value based on the generated labeling data. The proposed method is verified using a system based on Verilog RTL coding and LabVIEW for hardware implementation. The generated random numbers were tested according to the NIST SP 800-22 and SP 800-90B standards, and they satisfied the test items specified in the standard. Furthermore, the hardware is efficient and can be used for security, artificial intelligence, and Internet of Things applications in real time.

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