• Title/Summary/Keyword: NIST SP800-22

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Efficient hardware implementation and analysis of true random-number generator based on beta source

  • Park, Seongmo;Choi, Byoung Gun;Kang, Taewook;Park, Kyunghwan;Kwon, Youngsu;Kim, Jongbum
    • ETRI Journal
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    • v.42 no.4
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    • pp.518-526
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    • 2020
  • This paper presents an efficient hardware random-number generator based on a beta source. The proposed generator counts the values of "0" and "1" and provides a method to distinguish between pseudo-random and true random numbers by comparing them using simple cumulative operations. The random-number generator produces labeled data indicating whether the count value is a pseudo- or true random number according to its bit value based on the generated labeling data. The proposed method is verified using a system based on Verilog RTL coding and LabVIEW for hardware implementation. The generated random numbers were tested according to the NIST SP 800-22 and SP 800-90B standards, and they satisfied the test items specified in the standard. Furthermore, the hardware is efficient and can be used for security, artificial intelligence, and Internet of Things applications in real time.

Proposed image encryption method using PingPong256

  • Kim, Ki-Hwan;Lee, Hoon Jae;Lee, Young Sil
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.1
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    • pp.71-77
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    • 2020
  • In this paper, we propose a method in which PingPong256 combines LFSR and variable clock to generate an irregular PRNG and use it for image encryption. PingPong256 is guaranteed an extended period based on the two LFSRs, and the variable clock is a structure that outputs the result of operating a predetermined clock in one operation by referring to the state of the different LFSR. A variable clock is characterized by the difficulty of predicting the output at any time because the choice increases with time. PingPong256 combines the advantages of LFSR and variable clock, the convenience of hardware and software implementation, and the benefits of sensitivity and irregular periods. Also, the statistical safety was verified using the NIST SP800-22, the safety of the proposed method, and the sensitivity of the image change was tested using NPCR and UACI.

Blockchain Oracle for Random Number Generator using Irregular Big Data (비정형 빅데이터를 이용한 난수생성용 블록체인 오라클)

  • Jung, Seung Wook
    • Convergence Security Journal
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    • v.20 no.2
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    • pp.69-76
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    • 2020
  • Blockchain 2.0 supports programmable smart contract for the various distributed application. However, the environment of running smart contract is limited in the blockchain, so the smart contract only get the deterministic information, such as block height, block hash, and so on. Therefore, some applications, which requires random information, such as lottery or batting, should use oracle service that supply the information outside of blockchain. This paper develops a random number generator oracle service. The random number generator oracle service use irregular big data as entropy source. This paper tests the randomness of bits sequence generated from oracle service using NIST SP800-22. This paper also describes the advantages of irregular big data in our model in perspective of cost comparing hardware entropy source.

Comparison on Recent Metastability and Ring-Oscillator TRNGs (최신 준안정성 및 발진기 기반 진 난수 발생기 비교)

  • Shin, Hwasoo;Yoo, Hoyoung
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.543-549
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    • 2020
  • As the importance of security increases in various fields, research on a random number generator (RNG) used for generating an encryption key, has been actively conducted. A high-quality RNG is essential to generate a high-performance encryption key, but the initial pseudo-random number generator (PRNG) has the possibility of predicting the encryption key from the outside even though a large amount of hardware resources are required to generate a sufficiently high-performance random number. Therefore, the demand of high-quality true random number generator (TRNG) generating random number through various noises is increasing. This paper examines and compares the representative TRNG methods based on metastable-based and ring-oscillator-based TRNGs. We compare the methods how the random sources are generated in each TRNG and evaluate its performances using NIST SP 800-22 tests.

True Random Number Generator based on Cellular Automata with Random Transition Rules (무작위 천이규칙을 갖는 셀룰러 오토마타 기반 참난수 발생기)

  • Choi, Jun-Beak;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.52-58
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    • 2020
  • This paper describes a hardware implementation of a true random number generator (TRNG) for information security applications. A new approach for TRNG design was proposed by adopting random transition rules in cellular automata and applying different transition rules at every time step. The TRNG circuit was implemented on Spartan-6 FPGA device, and its hardware operation generating random data with 100 MHz clock frequency was verified. For the random data of 2×107 bits extracted from the TRNG circuit implemented in FPGA device, the randomness characteristics of the generated random data was evaluated by the NIST SP 800-22 test suite, and all of the fifteen test items were found to meet the criteria. The TRNG in this paper was implemented with 139 slices of Spartan-6 FPGA device, and it offers 600 Mbps of the true random number generation with 100 MHz clock frequency.

A Self-Timed Ring based Lightweight TRNG with Feedback Structure (피드백 구조를 갖는 Self-Timed Ring 기반의 경량 TRNG)

  • Choe, Jun-Yeong;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.24 no.2
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    • pp.268-275
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    • 2020
  • A lightweight hardware design of self-timed ring based true random number generator (TRNG) suitable for information security applications is described. To reduce hardware complexity of TRNG, an entropy extractor with feedback structure was proposed, which minimizes the number of ring stages. The number of ring stages of the FSTR-TRNG was determined to be a multiple of eleven, taking into account operating clock frequency and entropy extraction circuit, and the ratio of tokens to bubbles was determined to operate in evenly-spaced mode. The hardware operation of FSTR-TRNG was verified by FPGA implementation. A set of statistical randomness tests defined by NIST 800-22 were performed by extracting 20 million bits of binary sequences generated by FSTR-TRNG, and all of the fifteen test items were found to meet the criteria. The FSTR-TRNG occupied 46 slices of Spartan-6 FPGA device, and it was implemented with about 2,500 gate equivalents (GEs) when synthesized in 180 nm CMOS standard cell library.