High-Reliability Three-Phase Dual-Buck Grid-Connected Inverter without Shoot-Through Problem

Abstract

When compared to traditional bridge-type inverters, the dual-buck inverter has a higher reliability due to the fact that its bridge legs do not have a shoot-through problem. In this paper, the working principle of the dual-buck inverter is analyzed. A comparison of the working modes under full-cycle and half-cycle control is discussed. With half-cycle control, the inverter can realize a higher efficiency. However, this results in current zero-crossing distortion. The corresponding control strategy of the dual-buck inverter is proposed in order to realize both high efficiency and low current harmonic distortion. In addition, the system stability is analyzed. Dead-time is unnecessary due to the advantages of the topology. Thus, the current harmonic distortion can be further reduced. An inverter with the proposed control strategy has the advantages of high reliability, high efficiency and low current harmonic distortion. Finally, simulation and experimental results are given to verify the theoretical analysis.

I. INTRODUCTION

Three-phase grid-connected inverters are widely used in the fields of distributed generation, electric vehicles and so on [1]-[3]. The dual-buck topology can be applied in three-phase gridconnected inverters. When compared to the traditional bridgetype topology, the dual-buck topology has obvious advantages [4]-[6]. For example, the reverse recovery loss of the freewheeling diode is slight. As a result, the efficiency can be improved. There is no shoot-through problem of the bridge legs. Dead-time which can reduce the current Total Harmonic Distortion (THD) does not need to be added to the driving signals. Thus, the filter specifications, especially the LCL filter specification, can be reduced [7], [8]. Dead-time results in mostly low frequency harmonics [9]. The inhibition effect of the LCL filter on low-frequency harmonics is only equivalent to the L filter [10]. Without dead-time, the LCL filter specification can be greatly reduced.

Due to the above advantages, research on the principle and control strategy of three-phase dual-buck inverters is of great significance. In [11], a three-phase dual-buck inverter controlled by SVPWM has been introduced. SVPWM control is equivalent to third-time harmonic injection SPWM control, which can realize high DC voltage utilization. In [12], a three-phase dual-buck inverter is regarded as three independent single-phase dual-buck inverters. The three single-phase inverters are separately controlled and do not interact with each other. However, the filters are difficult to design. In [13], a vector mode single-cycle control strategy of a dual-buck inverter is proposed. Like the SVPWM control, the three-phase AC voltages are divided into six sectors. However, single-cycle control models for each of the sectors should be established, which complicates the control strategy.

Dual-buck inverters can work in models with and without bias current, which corresponds to full-cycle and half-cycle control respectively. In [14], two kinds of control methods are briefly introduced. The conclusions shows that half-cycle control can realize a higher efficiency than full-cycle control. Under full-cycle control, the two buck converters of each bridge leg work simultaneously. The inductor currents of each buck converter are always continuous. Thus, bias current occurs. Under half-cycle control, the two buck converters of each bridge leg work alternately. The inductor currents of each buck converter are only maintained for half cycle. There is no bias current. Therefore, a working model without bias current has lower switching and conduction losses than a working model with bias current [15], [16]. However, zero-crossing distortion cannot be avoided under half-cycle control.

In order to solve these problems, this paper studies the principle and control strategy of a three-phase dual-buck grid-connected inverter without dead-time. The working models under full-cycle and half-cycle control are analyzed in detail. A comparison of the working models shows that half-cycle control has obvious advantages. On this basis, a half-cycle control strategy of a dual-buck inverter is proposed. It can effectively inhibit zero-crossing distortion. The control strategy can realize a high-quality grid current and low switching loss. In addition, the stability of the inverter system with an LCL filter is not reduced. In addition, it can greatly reduce the filter specification and result in savings in terms of the size and cost of the system since the topology without a dead-zone can eliminate the low frequency harmonics introduced by dead-time.

The remainder of this paper is organized as follows. Section I introduces the dual-buck topology, and the relationship between the input and output is analyzed. Section II discusses the working principle of the inverter under full-cycle and half-cycle control, and the working modes comparison is analyzed in detail. Section III shows the control strategy, and the inhibition method of the zero-crossing distortion and the system stability are discussed. Finally, a simulation model and a principle prototype of an 18kW three-phase dual-buck grid-connected inverter are built to verify the theoretical analysis.

II. TOPOLOGY OF THE DUAL-BUCK INVERTER

Fig. 1 shows the topology of a dual-buck inverter. Taking phase a as an example, L_a1 and L_a2 are the converter-side inductances. Due to of L_a1 and L_a2, the shoot-through problem can be avoided. L_ag is the grid-side inductance. L_a1, L_a2, L_ag and C_a form the LCL filter. i_ar and i_ag are the converter-side and grid-side inductor currents of the LCL filter. U_DC is the input voltage. e_a is the grid voltage.

Fig. 1. Topology of a dual-buck inverter.

Fig. 2 shows waveforms of u_AN, U_DC and i_ag. u_AN can be expressed as:

\(u_{A N}=u_{A O}+u_{O N}=e_{a}+L_{a g} \frac{\mathrm{d} i_{a g}}{\mathrm{dt}}+u_{O N}\)       (1)

Fig. 2. Waveforms of u_AN, U_DC and i_ag.

The voltage of L_ag is far lower than that of e_a and u_ON. Thus, u_AN can be approximately expressed as:

\(u_{A N} \approx e_{a}+u_{O N}\)       (2)

The instantaneous value of u_ON is related to the switching vectors of the SVPWM modulation. It changes depending on the voltages U_DC, 2U_DC/3, U_DC/3 and 0. According to Fig. 2 and eq. (2), the relationship between u_AN and U_DC can be obtained, and is shown in Table I.

TABLE I RELATIONSHIP BETWEEN U_AN AND U_DC

In mode I, the polarity of e_a is positive. When the switching vector (111) works, the instantaneous value of u_AN is:

\(u_{A N \mid(111)}=e_{a}+U_{D C}\)       (3)

It can be seen that u_AN|(111) is higher than U_DC. When the switching vectors (110), (101) and (011) work, the instantaneous value of u_AN is:

\(u_{A N \mid(110)}=u_{A N \mid(101)}=u_{A N \mid(011)}=e_{a}+2 U_{D C} / 3\)       (4)

Under this condition, u_AN|(110), u_AN|(101) and u_AN|(011) are higher than U_DC when the instantaneous value of ea is higher than U_DC/3. When the switching vectors (100), (010) and (001) work, the instantaneous value of u_AN is:

\(u_{A N \mid(100)}=u_{A N \mid(010)}=u_{A N \mid(001)}=e_{a}+U_{D C} / 3\)       (5)

The input voltage is higher than 3e_a. Thus, u_AN|(100), u_AN|(010) and u_AN|(001) are lower than U_DC. When the switching vector (000) works, u_AN|(000) is e_a, which is also lower than U_DC. In mode II, the relationship between u_AN and U_DC can be obtained through the same analytical process.

Fig. 3 shows key waveforms of full-cycle and half-cycle control in mode I. The waveforms from top to bottom respectively are u_AN, the grid voltages, the three-phase driving signals and the inductance currents. Definitions of full-cycle and half-cycle control are given in [14]. The bridge leg output voltages of the two working models are the same. However, the inductance currents i_a1 and i_a2 are different. Therefore, the working modes of the two working models are different.

Fig. 3. Key waveforms of full-cycle and half-cycle control in mode I. (a) Full cycle control. (b) Half-cycle control.

III. WORKING PRINCIPLE

A. Full-Cycle Working Model

Mode I: In Fig. 3, e_a can be regarded as a constant value in a switching cycle because the switching frequency is much higher than the grid frequency. Taking Sector I as an example, the active switching vectors are (000) (100) (110) and (111). Fig. 4 shows the current direction of phase a in mode I under full-cycle control. From t₁ to t₆, given in Fig. 3(a), S₁ is on and S₂ is off. The current flows through S₁, L_a1, L_a2 and D₁, as shown in Fig. 4(a). From t₆ to t₇, the current flows through S₂, L_a1, L_a2 and D₂, as shown in Fig. 4(b).

Fig. 4. Current direction in mode I under full-cycle control. (a) S₁ on, S₂ off. (b) S₁ off, S₂ on.

t₁-t₂: The active switching vector is (100). According to Table I, u_AN is lower than U_DC, and the potential of point A is lower than that of point P. i_a1 increases and i_a2 decreases.

t₂-t₃: The active switching vector is (110). In Sector I, e_a is lower than U_DC/3. According to Table I, u_AN is lower than U_DC, i_a1 increases and i_a2 decreases. When compared to the period from t₁ to t₂, the potential difference of point A and point P during t₂ to t₃ is lower. Therefore, the slope of the current during t₂ to t₃ is lower than that during t₁ to t₂.

t₃-t₄: The active switching vector is (111). u_AN is higher than U_DC. i_a1 decreases and i_a2 increases.

t₄-t₅: The working principle is similar to that of t₂-t₃.

t₅-t₆: The working principle is similar to that of t₁-t₂.

t₆-t₇: The active switching vector is (000). u_AN is higher than 0, and the potential of point A is higher than that of point N. i_a1 decreases and i_a2 increases.

Mode II: The analysis process is similar to that of Mode I. The difference is that the direction of i_ar is opposite.

It can be seen that the currents of L_a1 and L_a2 always exist under full-cycle control. Under ideal conditions, the relationship between u_a1 and u_a2 is:

\(u_{a1}+u_{a2}=0\)       (6)

The relationship between i_a1 and i_a2 is:

\(i_{a1}-i_{a2}=i_{ar}\)       (7)

According to Fig. 2, u_AN is always higher than 0 in Mode I, which means that i_a1 decreases and i_a2 increases when S₂ turns on. According to (7), i_ar decreases. u_AN is always lower than U_DC in Mode II. i_a1 increases and i_a2 decreases when S₁ turns on. In addition, i_ar increases. It can be seen that under full-cycle control, L_a1 and L_a2 work in parallel. Assuming that L_a1=L_a2=L_r, the inverter-side equivalent inductor of the LCL filter L_ar can be expressed as:

\(L_{a r}=\frac{L_{a 1}}{2}=\frac{L_{a 1}}{2}=\frac{L_{r}}{2}\)       (8)

B. Half-Cycle Working Model

Mode I: As shown in Fig. 3(b), e_a and e_b are positive. The driving signals of the lower leg switches of the two phases are forced to be low. In addition, e_c is negative. The upper leg switch driving signal of phase c is forced to be low.

Fig. 5 shows the current direction of phase a in mode I under half-cycle control. The branch of S₂ does not conduct because its driving signal is forced to be low. L_a2 and D₁ form a branch where the current path is unidirectional.

Fig. 5. Current direction in mode I under half-cycle control. (a) S₁ on, S₂ off, D₁ off. (b) S₁ on, S₂ off, D₁ on. (c) S₁ off, S₂ off, D₁ on. (d) S₁ off, S₂ off, D₁ off.

Fig. 5(a) corresponds to the switching states during t₁ to t₃. L_a1 works separately. The value of the inverter-side equivalent inductor of the LCL filter is L_r. Fig. 5(b) corresponds to the switching states during t₃ to t₆. In addition, L_a1 and L_a2 work in parallel, and the inverter-side equivalent inductor L_ar is L_r /2. Fig. 5(c) corresponds to the switching states before i_a2 decreases to 0 during t₆ to t₇. In addition, L_a1 and L_a2 work in parallel. Fig. 5(d) corresponds to the switching states after i_a2 decreases to 0 during t₆ to t₇. Furthermore, L_a1 works separately.

t₁-t₂: The active switching vector is (100). u_AN is lower than U_DC, and i_a1 increases. Before t₁, i_a2 is 0. Therefore, D₁ does not freewheel during t₁ to t₂. D₁ is kept off and i_a2 is still 0.

t₂-t₃: The active switching vector is (110). i_a1 increases and i_a2 is still 0.

t₃-t₄: The active switching vector is (111). u_AN is higher than U_DC, and i_a1 decreases. Since the potential of point A is higher than that of point P, D₁ turns on, and i_a2 starts to rise from 0.

t₄-t₅: Unlike t₂-t₃, i_a2 not 0 before t₄. D₁ freewheels and i_a2 decreases.

t₅-t₆: Unlike t₁-t₂, D₁ freewheels. i_a1 increases and i_a2 decreases.

t₆-t₇: The active switching vector is (000). u_AN is higher than 0, and i_a1 decreases. Because S₂ is kept off, D₁ does not stop freewheeling until i_a2 decreases to 0.

Mode II: The analysis process is similar to that of Mode I. When L_a2 works separately, L_ar is L_r. When L_a1 and L_a2 work in parallel, L_ar is L_r/2.

According to a comparison analysis, L_ar is always L_r/2 under full-cycle control. Under half-cycle control, L_ar is L_r, when L_a1 or L_a2 works separately. The grid current harmonic can be expressed as:

\(I_{g h}=\left|\frac{U_{o h} k_{h}^{2}}{2 \omega_{h}\left[L_{a r}\left(k_{h}^{2}-1\right)+L_{g}\left(k_{h}^{2}-1\right)\right]}\right|\)       (9)

where U_oh is the output voltage harmonic of the bridge leg. In addition, k_h can be expressed as:

\(k_{h}=\frac{f_{r e s}}{h f_{1}}\)       (10)

where f_res is the resonant frequency of the LCL filter [17]. In addition, f₁ is the grid frequency. According to (9) and (10), the filtering effect under half-cycle control is better than that under full-cycle control.

In addition, the RMS current of the switches under half-cycle control is lower than that under full-cycle control. The authors of [14] give the conduction, switching and reverse recovery loss expressions of the power switches. It can be seen that the efficiency of half-cycle control is higher.

IV. CONTROL STRATEGY

According to [14], zero-crossing distortion is caused by sudden changes of the ripple current direction. Therefore, the current ripples of L_a1, L_a2, L_b1, L_b2, L_c1 and L_c2 should be inhibited as much as possible. Taking phase a as an example, when i_a is changed from positive to negative, before the zerocrossing point, the increment of i_a1 should be reduced when S₁ is turned on, which means reducing u_PA. In addtion, u_PA can be expressed as:

\(u_{P A}=u_{P N}-u_{A N} \approx U_{D C}-e_{a}-u_{O N}\)       (11)

After the zero-crossing point, the increment of i_a2 should be reduced when S₂ is turned on, which means reducing u_AN. According to (2) and (11), u_AN and u_PA can be controlled by changing u_ON. In addition, u_ON can be expressed as:

\(u_{O N}=\frac{u_{A O}+u_{B O}+u_{C O}}{3}\)       (12)

where u_AO, u_BO and u_CO are the output voltages of the three-phase bridge legs. They can be controlled by changing the voltage vector references in the control loop.

The essence of zero-crossing inhibition is to increase u_ON before the zero-crossing point, and to decrease u_ON after the zero-crossing point. When i_a changes from negative to positive, the principle is similar. Therefore, negative feedback of the current ripple method can be introduced to inhibit zero-crossing distortion. Fig. 6 shows the proposed control strategy. A high-pass filter (HPF) is introduced to extract the current ripple [18], [19]. The SVPWM driving signals are forced to be low during the corresponding half cycle.

Fig. 6. Control strategy of a three-phase dual-buck inverter.

When i_a changes from positive to negative, the ripple of i_a1 is positive before the zero-crossing point. After the negative feedbacks are added to u_α and u_β, the references that take part in the SVPWM decrease. That is to say, u_AO, u_BO and u_CO decrease. As a result, u_ON decreases, and according to equation (2), u_AN decreases. Thus, i_a1 decreases. After the zero-crossing point, according to eq. (11), u_PA decreases. As a result, the current near the zero-crossing point is close to 0 and zero-crossing distortion can be inhibited.

The transfer function of the HPF can be expressed as:

\(G_{H P F}(\mathrm{s})=\frac{H_{0} s^{2}}{s^{2}+\alpha \omega_{0} s+\omega_{0}^{2}}\)       (13)

where H₀ is the transmission gain. In addition, α is the damping coefficient, and ω₀ is the cut-off angular frequency. In order to detect the whole process of zero-crossing distortion, the cut-off frequency should be low. The grid frequency is 50Hz. Thus, the cut-off frequency is set as 150Hz. Because the proportional coefficient k₁ already exists, H₀ can be set as 1.

It can be seen that a HPF is added after current sampling. When compared to the traditional SVPWM strategy, the proposed strategy does not need additional sensors or sampling. The second-order HPF described in (13) has good performance and is easy to realize in digital control systems.

According to Fig. 6, a system block diagram can be obtained, as shown in Fig. 7. The closed-loop transfer function can be expressed as:

\(\frac{I_{g}(s)}{E R R(s)}=\frac{G_{P I}(s) G_{I N V}(s) G_{2}(s)}{1+G_{1}(s) G_{2}(s)}\)       (14)

where G_INV(s) is the transfer function of the inverter. It is a proportion-delay link [20]. G₁(s) and G₂(s) can be expressed as follows:

\(\left\{\begin{array}{c} G_{1}(\mathrm{s})=\frac{1+s C R}{\left(s L_{r}+R_{r}\right)\left(s L_{g}+R_{g}\right) s C} \\ G_{2}(s)=G_{1}(\mathrm{s})+k_{1} G_{H P F}(\mathrm{s}) G_{I N V}(\mathrm{s}) \end{array}\right.\)       (15)

where C is the filtering capacitor, and R is the damping resistor. R_r and R_g are the parasitic resistors of L_r and L_g.

Fig. 7. System block diagram.

In this paper, LCL filter capacitor current negative feedback active damping has been added [21]. The closed-loop transfer function can be expressed as:

\(\frac{I_{g}(s)}{E R R(s)}=\frac{G_{P I}(s) G_{I N V}(s) G_{3}(s)}{1+G_{1}(s) G_{3}(s)}\)       (16)

where G₃(s) can be expressed as:

\(G_{3}(\mathrm{s})=G_{2}(\mathrm{s})+\frac{s C\left(s L_{g}+R_{g}\right) k_{2} G_{I N V}(\mathrm{s})}{1+s C R}\)       (17)

where k₂ is the coefficient of the current sampling. According to the analysis of [21], the system can realize stability. As a result, the influence of the current ripple negative feedback on system stability can be inhibited.

V. EXPERIMENTAL RESULTS

Based on the above analysis, a simulation model of an 18kW three-phase dual-buck grid-connected inverter based on MATLAB/Simulink has been built. The input voltage is 700V DC. The output is connected to a 220V/380V/50Hz grid. The switching frequency is 5kHz. L_r is 1.6mH, C is 20μF, and L_g is 1.2mH.

Fig. 8 shows the inverter-side inductor currents during the zero-crossing period. The current is i_a1, i_a2 and i_ar. In Fig. 8(a), the current ripple before and after the zero-crossing point are obvious. In Fig. 8(b), the proposed control strategy with zero-crossing distortion inhibition has been applied. The current ripple can be effectively inhibited.

Fig. 8. Inverter-side inductor currents during the zero-crossing period. (a) Half-cycle control without zero-crossing distortion inhibition. (b) Half-cycle control with the proposed control strategy.

Fig. 9 shows the inverter-side inductor currents during 1.5 times the grid cycle. The corresponding grid-side current THD is 10.2% and 3.1%. It can be seen that the control method proposed in this paper can inhibit zero-crossing distortion and obtain higher quality current waveforms.

Fig. 9. Inverter-side inductor currents during 1.5 times the grid cycle. (a) Half-cycle control without zero-crossing distortion inhibition. (b) Half-cycle control with the proposed control strategy.

Fig. 10 shows grid-side inductor currents. Fig. 10(a) and Fig. 10(b) show the grid-side current of Fig. 9(a) and Fig. 9(b), respectively. In Fig. 10(a), half-cycle control leads to zero-crossing distortion. The three-phase currents interact with each other. In Fig. 10(b), zero-crossing distortion has been effectively inhibited. In Fig. 10(c), active damping is not added since it would cause current oscillations. The grid current THD is 5.3%.

Fig. 10. Grid-side currents. (a) Half-cycle control without zero-crossing distortion inhibition. (b) Half-cycle control with the proposed control strategy. (c) Half-cycle control without active damping.

A principle prototype has been built to verify the theoretical analysis. The parameters are the same as those of the simulation model.

Fig. 11 shows experimental results of half-cycle control without zero-crossing inhibition. The waveforms in Fig. 11(a) are the grid voltage e_a and the three-phase grid currents i_ag, i_bg and i_cg. The waveforms in Fig. 11(b) are the inverter-side inductor current i_ar and the driving signals of phase a. The driving signals are forced to be low during half of the grid cycle. The zero-crossing distortion occurs.

Fig. 11. Experimental results of half-cycle control without zero-crossing inhibition. (a) Grid-side inductor current. (b) Inverter-side inductor current.

Table II shows grid current THDs of the proposed control strategy with different values of k₁. If k₁ is 0, there is no current ripple negative feedback, and zero-crossing distortion occurs, which corresponds to Fig. 11(a). With the increment of k₁, the current distortion decreases. After k₁ reaches 100, zero-crossing distortion can be basically eliminated.

TABLE II THD OF GRID CURRENT WITH DIFFERENT VALUES OF K₁

Fig. 12 shows experimental results with zero-crossing distortion inhibition. k₁ is 100. In Fig. 12(a), active damping is not added. Although zero-crossing distortion can be inhibited, the grid current oscillates at the resonant frequency of the LCL filter. In Fig. 12(b)-(d) and (e), active damping is added. Oscillation disappears and the system stability can be improved. Fig. 12(b) shows the inductor current i_ar, i_a2 and the grid voltage e_a. Fig. 12(c) and 12(d) show the three-phase grid current under full load and half load. It can be seen that the proposed strategy is able to inhibit zero-crossing distortion under different loads. In the no-load condition shown in Fig. 12(e), the current is 0. When compared with Fig. 11, Fig. 12 can inhibit zero-crossing distortion.

Fig. 12. Experimental results with zero-crossing distortion inhibition. (a) Current oscillation without active damping. (b) inductor current with active damping. (c) Three-phase current under a full load. (d) Three-phase current under a half load. (e) Three-phase current under no load.

Table III shows the grid current THDs of the proposed control strategy with different loads. k₁ is 100. The THD decreases with the increment of the load. According to Fig. 12(c)-(e), under low load conditions, the high THD is not caused by zero-crossing distortion. Because the parameters of the LCL filter are fixed, the filtering affect is weaken under low load conditions.

TABLE III THD OF GRID CURRENT WITH DIFFERENT LOADS

VI. CONCLUSION

This paper analyzes the working principle of three-phase dual-buck grid-connected inverters. The cause of the zero-crossing distortion of grid current is discussed. The half-cycle SVPWM control strategy with negative current ripple feedback is proposed. Dual-buck inverters do not have a shoot-through problem and the harmonics caused by dead-time can be avoided. However, the current THD cannot be improved unless zero-crossing distortion is eliminated. Zero-crossing distortion inhibition is the premise of a low THD. With the proposed control strategy, the advantages of the dual-buck topology can be realized. The negative current ripple feedback control strategy can change the SVPWM vector reference during the zero-crossing time. Thus, the current ripple and the zero-crossing distortion can be effectively inhibited. As a result, half-cycle control can realize high efficiency and a low THD.